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EDB8164B4PR-1DITF-R 数据表(PDF) 36 Page - Micron Technology |
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EDB8164B4PR-1DITF-R 数据表(HTML) 36 Page - Micron Technology |
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36 / 152 page ![]() Table 20: MR2 Op-Code Bit Definitions Feature Type OP Definition RL and WL Write-only OP[3:0] 0001b: RL3/WL1 (default) 0010b: RL4/WL2 0011b: RL5/WL2 0100b: RL6/WL3 0101b: RL7/WL4 0110b: RL8/WL4 All others: Reserved Table 21: MR3 I/O Configuration 1 (MA[7:0] = 03h) OP7 OP6 OP5 OP4 OP3 OP2 OP1 OP0 RFU DS Table 22: MR3 Op-Code Bit Definitions Feature Type OP Definition DS Write-only OP[3:0] 0000b: Reserved 0001b: 34.3 ohm typical 0010b: 40 ohm typical (default) 0011b: 48 ohm typical 0100b: 60 ohm typical 0101b: Reserved 0110b: 80 ohm typical 0111b: 120 ohm typical All others: Reserved Table 23: MR4 Device Temperature (MA[7:0] = 04h) OP7 OP6 OP5 OP4 OP3 OP2 OP1 OP0 TUF RFU SDRAM refresh rate 216-Ball and 220-Ball, Dual-Channel LPDDR2 SDRAM Mode Register Definition 09005aef85eb530a 216b_220b_2ch_2e0e_embedded_lpddr2.pdf – Rev. F 08 /16 EN 36 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2014 Micron Technology, Inc. All rights reserved. |
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