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EDB8164B4PR-1DITF-R 数据表(PDF) 15 Page - Micron Technology |
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EDB8164B4PR-1DITF-R 数据表(HTML) 15 Page - Micron Technology |
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15 / 152 page ![]() Table 8: IDD6 Partial-Array Self Refresh Current at 105°C Dual die for Dual die prodct VDD2, VDDQ = 1.14–1.30V; VDD1 = 1.70–1.95V PASR Supply Value Unit Parameters/Conditions Full array VDD1 4800 μA All devices in self refresh CK_t = LOW, CK_c = HIGH; CKE is LOW; CA bus inputs are STABLE; Data bus inputs are STABLE VDDQVDDQ 28000 1/2 array VDD1 3200 VDDQVDDQ 15600 1/4 array VDD1 2200 VDDQVDDQ 9600 1/8 array VDD1 1800 VDDQVDDQ 6400 Note: 1. IDD6 105°C is the maximum of the distribution of the arithmetic mean, Quad die product will be double these values when all die are in self refresh mode. 216-Ball and 220-Ball, Dual-Channel LPDDR2 SDRAM IDD Specifications 09005aef85eb530a 216b_220b_2ch_2e0e_embedded_lpddr2.pdf – Rev. F 08 /16 EN 15 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2014 Micron Technology, Inc. All rights reserved. |
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