EDB8164B4PR-1DITF-R datasheet(100/152 Pages) MICRON

100 / 152 page

Table 57: Current State Bank n to Command to Bank m Truth Table (Continued)

Notes 1–6 apply to all parameters and conditions

Current State

of Bank n

Command to Bank m Operation

Next State for Bank m

Notes

Reading

(auto precharge

disabled)

READ

Select column and start READ burst

from bank m

Reading

WRITE

Select column and start WRITE burst to

bank m

Writing

9, 14

ACTIVATE

Select and activate row in bank m

Active

PRECHARGE

Deactivate row(s) in bank or banks

Precharging

Writing

(auto precharge

disabled)

READ

Select column and start READ burst

from bank m

Reading

9, 15

WRITE

Select column and start WRITE burst to

bank m

Writing

ACTIVATE

Select and activate row in bank m

Active

PRECHARGE

Deactivate row(s) in bank or banks

Precharging

Reading with

auto precharge

READ

Select column and start READ burst

from bank m

Reading

9, 16

WRITE

Select column and start WRITE burst to

bank m

Writing

9, 14, 16

ACTIVATE

Select and activate row in bank m

Active

PRECHARGE

Deactivate row(s) in bank or banks

Precharging

Writing with

auto precharge

READ

Select column and start READ burst

from bank m

Reading

9, 15, 16

WRITE

Select column and start WRITE burst to

bank m

Writing

9, 16

ACTIVATE

Select and activate row in bank m

Active

PRECHARGE

Deactivate row(s) in bank or banks

Precharging

Power-on

RESET

Begin device auto initialization

Resetting

17, 18

Resetting

MRR

Read value from mode register

Resetting MR reading

Notes:

1. This table applies when: the previous state was self refresh or power-down; after tXSR

or tXP has been met; and both CKEn -1 and CKEn are HIGH.

2. All states and sequences not shown are illegal or reserved.

3. Current state definitions:

Idle: The bank has been precharged and tRP has been met.

Active: A row in the bank has been activated, tRCD has been met, no data bursts or ac-

cesses and no register accesses are in progress.

Read: A READ burst has been initiated with auto precharge disabled and the READ has

not yet terminated or been terminated.

Write: A WRITE burst has been initiated with auto precharge disabled and the WRITE

has not yet terminated or been terminated.

4. Refresh, self refresh, and MRW commands can be issued only when all banks are idle.

216-Ball and 220-Ball, Dual-Channel LPDDR2 SDRAM

Truth Tables

09005aef85eb530a

216b_220b_2ch_2e0e_embedded_lpddr2.pdf – Rev. F 08 /16 EN

100

Micron Technology, Inc. reserves the right to change products or specifications without notice.

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