26HS01GTAM03 datasheet(23/166 Pages) INFINEON

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Datasheet

23 of 166

002-12337 Rev. *Y

2022-01-18

256Mb/512Mb/1Gb SEMPER™ Flash

HYPERBUS™ interface, 1.8V/3.0V

Address space maps

3.3

ID address space

This particular region of the memory is assigned to manufacturer, device, and unique identification:

• The manufacturer identification is assigned by JEDEC (see Table 134 and Table 135).

• The device identification is assigned by Infineon (see Table 134 and Table 135).

• A 64-bit unique number is located in 8 bytes of the Unique Device ID address space. This Unique ID can be used

as a software readable serial number that is unique for each device (see Table 136).

There is no address space defined for these IDs as they can be read by providing the respective transactions only.

The transactions do not need the address to read these IDs. The data in this address space is read-only data.

3.4

SFDP JEDEC JESD216 serial flash discoverable parameters (SFDP) space

The SFDP standard provides a consistent method of describing the functional and feature capabilities of this

serial flash device in a standard set of internal parameter tables. These parameter tables can be interrogated by

host system software to enable adjustments needed to accommodate divergent features. The SFDP address

space has a header starting at address zero that identifies the SFDP data structure and provides a pointer to each

parameter. The SFDP address space is programmed by Infineon and read-only for the host system.

HYPERBUS™ accesses the ID-SFDP ASO by issuing the ID-SFDP Entry command sequence during Read mode.

SFDP is an Address Overlay and must be mapped to a Sector Address (SA). Legacy (x1) SPI uses RSFDP_3_0 trans-

action to access SFDP and does not require an Address Overlay which must be omitted for Legacy (x1) SPI (see

Table 130 through Table 133).

3.5

Secure SSR address space

Each HS/L-T family memory device has a 1024-byte SSR which is OTP address space. This address space is

separate from the main flash array. The SSR area is divided into 32 individually lockable, 32-byte aligned and

length regions.

In the 32-byte region starting at address zero:

• The 16 lowest bytes contain a 128-bit random number. The random number cannot be written to, erased or

programmed and any attempts will return an PRGERR flag.

• The next four bytes are used to provide one bit per secure region (32 bits in total) to permanently protect once

set to “0” from writing, erasing or programming.

• All other bytes are reserved.

The remaining regions are erased when shipped from CYPRESS™, and are available for programming of

additional permanent data.

Table 7

SFDP overview address map

Byte address

Description

0000h

Location zero within JEDEC JESD216D SFDP space - start of SFDP header

,,,

Remainder of SFDP header followed by undefined space

0100h

0080h

Start of SFDP parameter tables. The SFDP parameter table data starting at

0100h.

...

Remainder of SFDP parameter tables followed by either more parameters or

undefined space

Note

11. Legacy (x1) SPI uses Read Serial Discoverable Parameters (RSFDP_3_0) transaction to read the Unique ID. Address is required.

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