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26HS01GTAM03 数据表(PDF) 89 Page - Infineon Technologies AG

部件名 26HS01GTAM03
功能描述  256Mb/512Mb/1Gb SEMPER??Flash HYPERBUS??interface, 1.8V/3.0V
PDF  166 Pages
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制造商  INFINEON [Infineon Technologies AG]
网页  http://www.infineon.com
标志 INFINEON - Infineon Technologies AG

26HS01GTAM03 数据表(HTML) 89 Page - Infineon Technologies AG

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002-12337 Rev. *Y
2022-01-18
256Mb/512Mb/1Gb SEMPER™ Flash
HYPERBUS™ interface, 1.8V/3.0V
Registers
5Registers
Registers are small groups of storage cells used to configure as well as report the status of the device operations.
HL-T/HS-T family of devices use separate nonvolatile and volatile storage groups to implement the different
register bit types for legacy compatibility as well as new functionality. Each register is organized as a group of
volatile bits with associated nonvolatile bits (if permanence is required). During power-up, hardware reset or
software reset, the data in the nonvolatile bits of the register is transferred to the volatile bits to provide the
default state of the volatile bits. When writing new data to nonvolatile bits of the register, the volatile bits are also
updated with the new data. However, when writing new data to the Volatile Register bits the nonvolatile bits
retain the old data. The register structure is shown in Figure 50.
Figure 50
Register structure
Figure 51
Data movement within register components
Note that SEMPER™ Flash with HYPERBUS™ interface uses a separate register set for each interface type:
HYPERBUS™ and Legacy (x1) SPI. Both register sets must be configured for their respective interface operation.
(example)



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