26HS01GTAM03 datasheet(21/166 Pages) INFINEON

21 / 166 page

Datasheet

21 of 166

002-12337 Rev. *Y

2022-01-18

256Mb/512Mb/1Gb SEMPER™ Flash

HYPERBUS™ interface, 1.8V/3.0V

Address space maps

3.2

Address space overlays (ASO) (HYPERBUS™ only)

Although the HYPERBUS™ protocol provides for slave devices that have both memory and register address

spaces, SEMPER™ Flash devices described in this specification do not differentiate between memory and

registers as separate address spaces. There is a single address space selected by any transaction, independent

of whether the HYPERBUS™ transaction indicates the target location is in memory space or register space of the

selected device.

Write transactions always place the transaction address and data into a command register set (buffer).

Read transactions return data from the memory array or from a register address space window that has been

temporarily overlaid within the single address space by the execution of commands. The single address range

with register space overlays methodology is backward compatible with legacy parallel NOR Flash memory

program and erase software drivers.

There are several separate address spaces that may appear within the address range of the flash memory device.

One address space is visible (entered) at any given time.

• FlashMemory Array:themainnonvolatile memoryarrayusedforstorage ofdatathat maybe randomlyaccessed

by read operations.

• ID/SFDP (ID): a flash memory array used for CYPRESS™ factory programmed device characteristics information.

This area contains the Device Identification (ID), Unique ID (UID) and Serial Flash Discoverable Parameter (SFDP)

parameters/tables.

• SSR: a 1024B OTP nonvolatile memory array used for CYPRESS™ factory programmed permanent data, and

customer programmable permanent data.

• ASP configuration register: a register to configure the device’s data protection schemes.

• Password (PSWD): an OTP nonvolatile array used to store a 64-bit password used to enable changing the state

of the PPB Lock Bit when using Password Mode Sector Protection.

• Persistent Protection Bits (PPB): a nonvolatile memory array with one bit for each Sector. When programmed,

each bit protects the related Sector from erasure and programming.

• PPB Lock Bit (PPBL): a Volatile Register bit used to enable or disable programming and erase of the PPB bits.

• Dynamic Protection Bits (DYB): a volatile array with one bit for each Sector. When set, each bit protects the

related Sector from erasure and programming.

• ECC Status (ECCST): read the ECC Status, address of ECC error and total ECC error count.

• Data Integrity Check (DICRC): read the memory array data CRC check-value.

• Interface CRC (ICRC): read the interface CRC check-value.

• AutoBoot (ATB): a Nonvolatile Register to set the starting address and delay for AutoBoot feature.

• Sector Erase Count (SEC): a 32-bit value showing the number of times a sector has been erased.

•Infineon Endurance Flex architecture’s pointers (EFP): a set of five Nonvolatile registers to configure four

pointers to choose between either high endurance or long retention memory regions.

• Status or Peripheral Registers: register access used to display EA status and read or write other registers.

The flash memory array is the primary and default address space but, it may be overlaid by one other address

space, at any one time. Each alternate address space is called an ASO.

Each ASO replaces (overlays) either the sector selected by the command that enters the ASO or the entire flash

device address range, depending on the ASO entry command. If only one sector is overlaid by an ASO the

remaining sectors of the memory array remain readable. Any address range not defined by a particular ASO

address map, is reserved for future use. Unless otherwise stated all read accesses outside of an ASO address map

returns non-valid (undefined) data. The locations will display actively driven data but their meaning is not

defined.

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