26HS01GTAM03 datasheet(42/166 Pages) INFINEON

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Datasheet

42 of 166

002-12337 Rev. *Y

2022-01-18

256Mb/512Mb/1Gb SEMPER™ Flash

HYPERBUS™ interface, 1.8V/3.0V

Features

4.5.1.7

Read password protection mode

The Read Password mode can replace the default Password protection mode on page 40. The Read Password

mode is enabled to replace the default PPB Password Protection mode when the user programs ASPR[5] = 0. The

Read Password mode is not active until the password is programmed and ASPR[2] is programmed to 0.

The Read Password Protection mode enables protecting the Flash Memory Array from read, program, and erase.

Only the lowest or highest (256KB) sector address range, selected by the Nonvolatile Configuration Register bits

xVCR1[9:8], remains readable until a successful Password Unlock command is completed. Note that reads from

the read-protected portion of the array will alias back to the readable sector.

In this mode, the PPB Lock bit is used to control the high order bits of address. When the PPB Lock bit is “1”, the

address bits operate normally. When the PPB Lock bit is “0”, the address bits that select a main array sector

address range are forced either to 0s or to 1s to select the lowest or highest address Flash Memory Array address

range. In SPI, TBPROT (CFR1x[5] is used for this address range selection whereas in HYPERBUS™, TB4KBS[1:0]

(CFR1x[9:8] bits are used.

Note that AutoBoot is disabled when the Read Password protection is enabled. The ATBR[0] (AutoBoot Enable)

bit is ignored in Read Password mode.

The PPB bits are protected from program and erase when the PPB Lock bit is 0, and may be programmed or

erased when the PPB Lock bit is 1.

The PPB Lock bit is set to 0 by POR or Hardware Reset, same as in PPB Password Protection mode.

The Read Password Protection scheme flowchart is shown in Figure 30.

Table 25

ASP configuration register selection of persistent and password protection modes

ASPO bit

Default value

Name

Persistent / Password Protection Mode Lock bits

ASPR[2:1] = 00: Not Allowed

ASPR[2:1] = 01: Password Mode Permanently Enabled

ASPR[2:1] = 10: Persistent Mode Permanently Enabled

ASPR[2:1] = 11: Persistent / Password Modes Disabled (factory default)

Table 26

HYPERBUS™ CFR1x mapping of boot block address range

CFR1x bit

Default value

Name

CFR1x[9:8]

00 = Map Parameter-Sectors and Read Password Sector mapped into lowest addresses.

01 = Map Parameter-Sectors and Read Password Sector mapped into highest addresses.

10 = Uniform Sectors with Read Password Sector mapped into lowest addresses.

11 = Uniform Sectors with Read Password Sector mapped into highest addresses.

Table 27

Legacy (x1) SPI CFR1x mapping of boot block address range

CFR1x bit

Default value

Name

CFR1x[5]

0 = Map Parameter-Sectors and Read Password Sector mapped into highest (top)

addresses.

1 = Map Parameter-Sectors and Read Password Sector mapped into lowest (bottom)

addresses.

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