in the comparison. If the filtering matches for a specific frame, then it is passed on to the DMA memory. Otherwise

the frame is dropped. Frames may also be filtered using the Type ID field for matching. There are four Type ID

registers in the internal register space and these may be enabled individually. Hashing of the received frame’s DA

may be configured, as described in the PolarFire SoC MSS Technical Reference Manual.

3.5.1.2.2 External Filtering

To allow for more sophisticated matching of incoming frames, based on more than just addresses, for example, an

external filtering interface is present. As a frame is received, the MAC parses the frame and determines what field is

currently present. A strobe signal is provided to allow latching of each field in the fabric. Customized (combinational)

matching circuitry can then analyze whether or not it is interested in the particular frame (filtering use case) or what

receive priority queue to put the frame in (prioritizing use case).

3.5.2

MMC 5.1/SD/SDIO/eMMC

PolarFire SoC contains one MMC5.1 compliant peripheral and PHY. The controller interfaces to MSS I/O through

the IOMUXs to MSSIO exclusively. PolarFire SoC MSS I/Os do not support the dynamic voltage scaling of some

SD cards, external voltage level translators should be used if required. The following eMMC/SD card standards are

supported in PolarFire SoC. The SDIO/eMMC interface supports its own DMA controllers for data transfers. The DMA

controllers support SDMA and ADMA2 modes.

3.5.2.1

SD Card Standards

• Default Speed (DS)

• High Speed (HS)

• UHS-I SDR12

• UHS-I SDR25

• UHS-I SDR50

• UHS-I SDR104

• UHS-I DDR50

3.5.2.2

eMMC Standards

• Standard Speed

• High Speed

• DDR52

• HS200

• HS400

• HS400 Enhanced Strobe

3.5.3

USB 2.0 OTG

PolarFire SoC includes a USB 2.0 OTG-compliant core with an ULPI interface to the IOMUX, and then on to

dedicated MSS I/O. The USB core supports the following features:

• Operates either as the function controller of a high/full-speed USB peripheral or as the host/peripheral in

point-to-point or multi-point communications with other USB functions

• Complies with the USB 2.0 standard for high-speed (480 Mbps) functions and with the on-the-go supplement to

the USB 2.0 specification

• Supports OTG communications with one or more high-, full-, or low-speed device

• Supports Session Request Protocol (SRP) and Host Negotiation Protocol (HNP)

• Supports suspend and resume signaling

• Supports Link Power Management

• Offers dynamic allocation of endpoints to maximize number of devices supported

• Number of Tx endpoints: 4 (plus control endpoint)

• Number of Rx endpoints: 4 (plus control endpoint)

• Multipoint capabilities supported

• Software connect/disconnect feature enabled

• High bandwidth support for ISO enabled endpoints

Microprocessor Subsystem

© 2021 Microchip Technology Inc.

and its subsidiaries

Overview

DS60001656C-page 20