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MPFS160T 数据表(PDF) 7 Page - Microchip Technology

部件名 MPFS160T
功能描述  PolarFire® SoC Product Overview
PDF  50 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

MPFS160T 数据表(HTML) 7 Page - Microchip Technology

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1.
Block Diagram
The following illustration shows the functional blocks of PolarFire SoC.
Figure 1-1. Block Diagram
DDRIO PHY
36-bit DDR3/4, LPDDR3/4 Controller
2–64b AXI4; 32b APB
AMBA Switch with Memory Protection and QoS
Coherent Switch
Anti Tamper
System Controller
SPI Programming
System Services
PUF
sNVM
Hart Software
Services
Platform Interrupt Controller
Perfomance/Event Counters
Instruction Trace
AXI BUS Monitors
50 Breakpoints
DMA
128b
Fabric Logic Monitor
SmartDebug
Debug Locks
Local Interrupt Controller
RISC-V
RV64IMAC
E51
Monitor Core
RISC-V
RV64GC
U54
Application Core
128 KB
Boot Flash
3–64b AXI4
5–64b AXI4
4–128b
PMP
MMU
32K D$
32K I$ITIM
PMP
Secure Boot
8K DTIM
16K I$ITIM
128b
64b AXI4
64b AXI4
32b AHB
IO
128b AXI4
128b
64b
AXI4
2MB Memory
(L2 Cache, Scratchpad Memory,
Deterministic Memory modes)
HSIO
1.8V to 1.2V
DDR4/LPDDR4
1.6 Gbps
PolarFire® FPGA
*DPA-Safe Crypto co-processor supported in S devices
**SECDED supported on all MSS memories
Hardened Microprocessor Subsystem
GPIO
3.3V to 1.2V
SGMII
1.6 Gbps LVDS
PCIe® Gen 2
EP/RP, DMA
x1, x2, x4
PCIe Gen 2
EP/RP, DMA
x1, x2
Transceivers
PolarFire® FPGA Fabric
64b6xb
8b10b
CTLE
DFE
18 × 18 MACC
Pre Adder
LSRAM 20 Kb
SECDED
uSRAM
768 bits
PLLs/DLLs
Crypto*
2×GbE
2×CAN
2×SPI
5× UART
GPIO
RTC
USB OTG
2×I2C
XIP-QSPI
MMC 5.1
PIPE
OOB
Loop Back
Eye Monitor
PolarFire® SoC Block Diagram
Note: The microprocessor subsystem and the FPGA operate on the same power domain.
Block Diagram
© 2021 Microchip Technology Inc.
and its subsidiaries
Overview
DS60001656C-page 7



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