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ADP5140WACCZ-R7 数据表(PDF) 3 Page - Analog Devices |
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ADP5140WACCZ-R7 数据表(HTML) 3 Page - Analog Devices |
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3 / 128 page  Data Sheet ADP5140 Rev. 0 | Page 3 of 128 FUNCTIONAL BLOCK DIAGRAM PVIN1 PVIN1 + _ + _ BUCK1 CONTROL LOGIC SLOPE COMP PVIN2 PVIN2 + _ LOW-SIDE CURRENT SENSE + _ HIGH-SIDE CURRENT SENSE BUCK2 CONTROL LOGIC VOLTAGE MONITOR VOLTAGE MONITOR VOLTAGE MONITOR VOLTAGE MONITOR SLOPE COMP CHANNEL 1 – BUCK1 CHANNEL2 – BUCK2 CHANNEL3 – BUCK3 CHANNEL4 – BUCK4 PVIN4 PVIN4 + _ + _ BUCK4 CONTROL LOGIC SLOPE COMP + _ CURRENT SENSE BOOST CONTROL LOGIC VOLTAGE MONITOR SW12 OUT12 FB12 CHANNEL12 – BOOST FB10 VOLTAGE MONITOR VOLTAGE MONITOR + _ OUT10 PVIN1011 LDO6 LOGIC CONTROL VREF10 EA CHANNEL10 – LDO6 FB11 OUT11 CHANNEL11 – LDO7 FB5 VOLTAGE MONITOR + OUT5 PVIN56 VREF5 EA CHANNEL 5 – LDO1 FB6 OUT6 CHANNEL6 – LDO2 FB7 VOLTAGE MONITOR + _ OUT7 PVIN78 VREF7 EA CHANNEL7 – LDO3 FB8 OUT8 CHANNEL8 – LDO4 FB9 + _ OUT9 PVIN9 VREF9 EA CHANNEL9 – LDO5 REFCAP AVIN INTERNAL REGULATOR VREG SPI INTERFACE CS SCK MOSI MISO MODE AVDD DIGITAL CONTROL EN SEQUENCE CONTROL SEQ WAKE UP CONTROL WAKE RESET FAULT STATUS FAIL SAFE OUTPUT CONTROL OSCILLATOR SYNC CLK_2MHz CLK_4.4MHz WINDOW WATCHDOG AND PULSE WIDTH MONITOR VOLTAGE SUPERVISOR EN4 EN3 EN2 EN1 DVS DVS EN5 EN6 EN7 EN8 EN9 EN10 EN11 EN12 PGND PVIN1 FB4 WDI0 WDI1 VM0 VM1 QA WATCHDOG FUSA BAND GAP MAIN BAND GAP VREF1 FREQUENCY DIVIDER CLK_2.2MHz CLOCK MONITOR CLK_2MHz CLK_4.4MHz TSD VREF2 SHADOW REGISTER AVIN TEMPERATURE WARNING TEMPERATURE WARNING LDO5 LOGIC CONTROL TEMPERATURE WARNING LDO3 LOGIC CONTROL TEMPERATURE WARNING LDO1 LOGIC CONTROL TEMPERATURE WARNING TEMPERATURE WARNING TEMPERATURE WARNING VREF2 VREF2 VREF2 VREF2 VREF2 VREF2 VREF2 VREF2 VREF2 VREF2 NVM SW1 FB1 VSET1 VIO PVIN2 SW2 FB2 PVIN3 SW3 FB3 PVIN4 SW4 LOW-SIDE CURRENT SENSE HIGH-SIDE CURRENT SENSE LOW-SIDE CURRENT SENSE HIGH-SIDE CURRENT SENSE Figure 1. |
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