ADP5140WACCZ-R7 datasheet(38/128 Pages) AD

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ADP5140

Data Sheet

Rev. 0 | Page 38 of 128

FBx FAULT HIGH THRESHOLD

FBx WARNING HIGH THRESHOLD

FBx WARNING LOW THRESHOLD

FBx FAULT LOW THRESHOLD

FBx TYPICAL VALUE

HYSTERESIS

FBx RISING

FBx FALLING

NO WARNING

WARNING

FAULT

NO FAULT

FAULT

WINDOW

WARNING

WINDOW

WARNING

WINDOW FAULT

WINDOW

Figure 81. FBx Voltage Window Comparator

If the voltage on the FBx pin is outside of the warning window,

the regulator still functions and sets the corresponding warning bit

in the WARN_STATUS register and WARN_LATCH register.

If the voltage on the FBx pin is lower than the fault low threshold,

the regulator still functions and sets the corresponding

x_UV_STATUS bit in the UV_STATUS register and

UV_LATCH register.

If the voltage on the FBx pin is higher than the fault high

threshold, the regulator turns off and sets the corresponding

x_OV_STATUS bit in the OV_STATUS register and

OV_LATCH register.

The warning window and fault window are programmable

through the FBx_WARN_WINDOW and FBx_FAULT_

WINDOW bits in the WARN_WINDOW and FAULT_

WINDOW SPI registers. The programmable range is from 4%

to 8%, as shown in Table 21 and Table 22, with a fixed

hysteresis. These threshold windows are referenced to the

normal output voltage on the power rail. See Table 1 for the

detailed specification.

Table 21. FBx Voltage Monitor Warning Window

FBx_WARN_WINDOW, Bits[1:0]

Warning Window (%)

01 (Default)

Table 22. FBx Voltage Monitor Fault Window

FBx_FAULT_WINDOW, Bits[1:0]

Fault Window (%)

10 (Default)

The blank time of the FBx voltage monitor is programmable

through the FBx_BLANK_TIME bits in the VOLTAGE_

BLANK_TIME0 and VOLTAGE_BLANK_TIME1 SPI registers.

The programmable range is from 16 µs to 352 µs, as shown in

Table 23.

Table 23. Voltage Monitor Blank Time

FBx_BLANK_TIME, Bits[3:0]

Blank Time (µs)

0000

0001

0010 (Default)

0011

0100

0101

0110

112

0111

128

1000

144

1001

160

1010

176

1011

192

1100

208

1101

240

1110

288

1111

352

VMx VOLTAGE SUPERVISOR

The ADP5140 integrates two voltage supervisors, VM0 and

VM1. The VMx voltage supervisors monitor the voltage added

on the VMx pin and compare the voltage with the internal

600 mV reference voltage. The voltage monitor function of VMx

is disabled by default and can be enabled as a single overvoltage

or undervoltage monitor or window monitor according to the

VMx_TYP bits settings in the VM_TYP_CONFIGURATION

band gap powered by the AVDD pin.

When VMx is configured as a window monitor, and the voltage

on the VMx pin is out of the monitoring window, a warning or

fault event is reported in the WARN_STATUS, OV_STATUS,

and UV_STATUS registers, and the relevant latch bits in the

WARN_LATCH, OV_LATCH, and UV_LATCH registers are

set.

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