| 数据搜索系统,热门电子元器件搜索 |
|
ADP5140WACCZ-R7 数据表(PDF) 59 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADP5140WACCZ-R7 数据表(HTML) 59 Page - Analog Devices |
|
59 / 128 page ![]() Data Sheet ADP5140 Rev. 0 | Page 59 of 128 PCB LAYOUT RECOMMENDATIONS In any switching power supply, there are some circuit paths that carry high dI/dt, which create spikes and noise. Some circuit paths are sensitive to noise, such as feedback traces, which must be devoid of spikes and noise. The key to proper PCB layout is to identify these critical paths and arrange the components and the copper area accordingly. When designing PCB layouts, keep high current loops small. In addition, keep sensitive traces and components away from the switching nodes and the associated components. Figure 96 shows a recommended PCB layout for the ADP5140. The following layout rules are recommended for the ADP5140: • Place the input capacitor, output capacitor, and inductor as close as possible to the IC and use short traces. • Use separate analog ground planes (GND) and power ground planes. Connect the ground reference of sensitive analog circuitry, such as output voltage divider components, reference capacitors, and output capacitors of the LDO regulators to analog ground. In addition, connect the ground reference of the power components, such as input and output capacitors of the buck and boost regulators, to power ground. Use the internal ground planes to connect the analog ground plane and power ground plane together. • Connect the exposed pads of the ADP5140 to the internal ground plane. • Separate the input power trace of each switching regulator. Using BUCK1 and BUCK2 as an example, although PVIN1 and PVIN2 are adjacent pins and are usually connected to the same input power, do not connect them directly near the IC pins. Use a separated input trace to connect each PVIN pin to its input capacitor. • Ensure that the high current loop traces are as short and as wide as possible. Using a BUCKx regulator as an example, ensure that the high current path from the input capacitor through the inductor, the output capacitor, and the power ground plane back to the input capacitor is as short as possible by making sure that the input and output capacitors share a common power ground plane. • Place the feedback resistor dividers as close as possible to the FBx pins to prevent noise pickup. Minimize the length of the feedback traces away from the high current traces and the switching nodes to avoid noise pickup. CIN3 CIN4 L12 RVSET1 RMODE RTOP2 RBOT2 L2 L1 LFILTER CFILTER CFILTER CFILTER L3 L4 COUT7 COUT8 CFB4 RFB4 CIN78 CIN1 CIN2 CIN1011 COUT11 COUT10 ADP5140 Figure 96. Recommended PCB Layout |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |