ADP5140WACCZ-R7 datasheet(33/128 Pages) AD

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Data Sheet

ADP5140

Rev. 0 | Page 33 of 128

THEORY OF OPERATION

The ADP5140 is a power management IC that integrates four

buck regulators, one boost regulator and seven low noise LDO

regulators in a 56-terminal LGA. The device can operate with

an input voltage from 2.7 V to 5.5 V and can regulate multiple

output voltages in a wide range from 0.55 V to 5 V. The

ADP5140 provides an input UVLO feature and monitors the

output voltage of each power rail. The device integrates power-

up and power-down sequence circuitry, watchdog inputs, and

RESET, FAULT, and STATUS outputs to enhance system

reliability. The ADP5140 provides an SPI to achieve fast

communication with the processor.

SYNCHRONOUS BUCK REGULATORS

The ADP5140 integrates four high performance, synchronous

buck regulators, BUCK1, BUCK2, BUCK3, and BUCK4. Both

high-side and low-side metal oxide silicon field effect transistors

(MOSFETs) of each buck regulator are integrated into the

device. The buck regulators operate with an input voltage from

2.7 V to 5.5 V. BUCK1 and BUCK2 provide an output current of

up to 2.5 A, and BUCK3 and BUCK4 provide an output current of

up to 3 A.

Control Scheme

The buck regulators in the ADP5140 use a fixed frequency,

peak current mode, pulse-width modulation (PWM) control

architecture. At the start of each oscillator cycle, the high-side

MOSFET turns on and places a positive voltage across the

inductor. The inductor current increases until the current sense

signal crosses the peak inductor current threshold that turns off

the high-side MOSFET and turns on the low-side MOSFET,

which places a negative voltage across the inductor and causes

the inductor current to reduce. The low-side MOSFET stays on

for the remainder of the cycle until the next cycle starts.

Oscillator and Phase Shift

The buck regulators in the ADP5140 run in a 2.2 MHz fixed

frequency. BUCK1 to BUCK4 run at an even phase shift, as

shown in Figure 76, which reduces the input ripple current and

the input voltage spikes to help lower the system EMI.

SW1

SW3

SW2

SW4

INTERNAL

CLOCK

90°

Figure 76. Even Phase Shift Between Buck Regulators

Output Voltage Setting

The BUCK1 output voltage (VOUT1) is either programmed with

an external resistor or programmed through the SPI. Connect a

resistor (RSET1) between the VSET1 pin and ground to set VOUT1

as shown in Table 15.

Table 15. RSET1 vs. VOUT1

RSET1 (kΩ)

VOUT1 (V)

5.62

0.8

7.87

0.85

0.9

15.4

0.95

21.5

1.0

30.1

1.05

42.2

1.1

1.15

84.5

1.2

115

1.25

162

1.27

232

1.3

316

1.35

475

1.4

Note that RSET1 must have ±1% tolerance with a 100 ppm

temperature coefficient.

When BUCK1 receives an SPI command to change the output

voltage, the SPI command takes over control of the output

voltage setting. The BUCK4 output voltage (VOUT4) is

programmed through SPI with 0.65 V as the default. Table 16

and Table 17 show the SPI programmable options for VOUT1

and VOUT4, respectively.

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