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ADP5140WACCZ-R7 数据表(PDF) 69 Page - Analog Devices

部件名 ADP5140WACCZ-R7
功能描述  Power Management IC for Automotive Application
PDF  128 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP5140WACCZ-R7 数据表(HTML) 69 Page - Analog Devices

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Data Sheet
ADP5140
Rev. 0 | Page 69 of 128
Table 49. OTHER_STATUS, Register Address: 0x2014
Bits
Bit Name
Description
Reset
Access
[31:29]
RESERVED
Reserved.
0x0
R
28
WDI1_EXT_STATUS
Falling Edge Detection on WDI1 when WD1 is Disabled.
0x0
R
0: no falling edge detected on WDI1.
1: falling edge detected on WDI1.
27
WDI0_EXT_STATUS
Falling Edge Detection on WDI0 when WD0 is Disabled.
0x0
R
0: no falling edge detected on WDI0.
1: falling edge detected on WDI0.
26
VSET1_DETECTION_STATUS
VSET1 Pin Detection Status.
0x0
R
0: VSET1 pin detection pass.
1: VSET1 pin detection fail.
25
MODE_DETECTION_STATUS
MODE Pin Detection Status.
0x0
R
0: MODE pin detection pass.
1: MODE pin detection fail.
24
SYNC_STATUS
Synchronization Status when Configured as Sync In.
0x0
R
0: synchronization complete.
1: synchronization fail.
23
WDI1_PULSE_STATUS
Pulse Monitor Status on the WDI1 pin.
0x0
R
0: pulse on WDI1 is within range.
1: pulse on WDI1 is out of range.
22
WDI0_PULSE_STATUS
Pulse Monitor Status on the WDI0 Pin.
0x0
R
0: pulse on WDI0 is within range.
1: pulse on WDI0 is out of range.
21
CLKM_FAIL_STATUS
Clock Monitor Fail Status.
0x0
R
0: no clock drift occurs.
1: clock drift occurs.
20
SHR_CRC_STATUS
CRC Error Status in the Shadow Register.
0x0
R
0: no CRC error.
1: CRC error.
19
SHR_ECC_STATUS
ECC Two-Bit Error Status in Shadow Register.
0x0
R
0: no two bits ECC error.
1: two bits ECC error.
18
STATUS_EXT_STATUS
External Fail on the STATUS Pin.
0x0
R
0: no output pin fail on the STATUS pin.
1: output pin fail on the STATUS pin.
17
FAULT_EXT_STATUS
External Fail on the FAULT Pin.
0x0
R
0: no output pin fail on the FAULT pin.
1: output pin fail on the FAULT pin.
16
RESET_EXT_STATUS
External Fail on the RESET Pin.
0x0
R
0: no output pin fail on the RESET pin.
1: output pin fail on the RESET pin.
[15:9]
RESERVED
Reserved
0x0
R



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