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ADP5140WACCZ-R7 数据表(PDF) 57 Page - Analog Devices |
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ADP5140WACCZ-R7 数据表(HTML) 57 Page - Analog Devices |
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57 / 128 page ![]() Data Sheet ADP5140 Rev. 0 | Page 57 of 128 Output Capacitor Selection for the LDO Regulators The output capacitance of the LDO regulators depends mainly on the load current. Generally, a large load current requires a large output capacitance to achieve a stable output voltage. A higher capacitor value improves the transient response of the LDO regulators to large changes in the load current. Ceramic capacitors with a typical value of 1 μF to 10 μF are recommended as the output capacitors of the LDO regulators in the ADP5140. LOW OUTPUT NOISE DESIGN OF BUCK4 In typical system application of the ADP5140, BUCK4 provides power for the power amplifier, which requires low noise input. BUCK4 in the ADP5140 optimizes the internal analog blocks and uses low noise reference architecture to achieve lower output noise. When the system design requires BUCK4 of the ADP5140 to power the power amplifier directly without the LDO regulator, it is highly recommended to add an additional secondary LC filter after the primary LC filter to filter the fundamental switching ripple further and achieve lower output noise in the noise sensitive frequency range of the power amplifier. Because the secondary LC filter generates voltage drop when the load increases, an inductor with a small dc current resistance (DCR) is recommended to minimize the voltage drop, especially for a high current application. There is a hybrid feedback method, as shown in Figure 95, which provides an adequate stability margin and maintains the output accuracy over all load conditions in the application where the secondary LC filter of BUCK4 is added. CF RF CSEC_F RESR_F RL LSEC_F VOUT4 SW4 FB4 PGND Figure 95. Hybrid Feedback Method of BUCK4 With Secondary LC Filter To maintain the loop stability of BUCK4 when using the hybrid feedback method, the value constrains of the components shown in the following equation must be met: _ _ _ _ _ SEC F SEC F SEC F SEC F FF ESR F L C R L C RC R L × ×> +× where: RF is the feedback resistor. CF is the feedback capacitor. LSEC_F is the inductor of the secondary LC filter. CSEC_F is the capacitor of the secondary LC filter. RESR_F is the equivalent series resistance of CSEC_F. RL is the load resistance. Note that larger RF and CF values degrade the load transient performance of BUCK4 because RF and CF work as an RC filter of the output voltage during load transient. It is recommended that RF × CF be 20% to 30% larger than the minimum limitation value shown in the previous equation to balance the loop stability and load transient performance. VOLTAGE CONVERSION LIMITATIONS There is a minimum on time and a minimum off time for each switching regulator. The voltage conversion between the input voltage and output voltage of each switching regulator has limitations. Buck Regulator The minimum output voltage of a buck regulator for a given input voltage and switching frequency is constrained by the minimum on time of the buck regulator and can be calculated using the following equation: VOUT_MIN = VIN × tMIN_ON × fSW − (RDSON_HS − RDSON_LS) × IOUT_MIN × tMIN_ON × fSW − (RDSON_LS + RL) × IOUT_MIN where: VOUT_MIN is the minimum output voltage. VIN is the input voltage. tMIN_ON is the minimum on time. RDSON_HS is the high-side MOSFET on resistance. RDSON_LS is the low-side MOSFET on resistance. IOUT_MIN is the minimum output current. RL is the series resistance of output inductor. The maximum output voltage of a buck regulator for a given input voltage and switching frequency is constrained by the minimum off time of the buck regulator and can be calculated using the following equation: VOUT_MAX = VIN × (1 − tMIN_OFF × fSW) − (RDSON_HS − RDSON_LS) × IOUT_MAX × (1 − tMIN_OFF × fSW) − (RDSON_LS + RL) × IOUT_MAX where: VOUT_MAX is the maximum output voltage. tMIN_OFF is the minimum off time. IOUT_MAX is the maximum output current. Boost Regulator The maximum input voltage of the boost regulator for a given output voltage and switching frequency is constrained by the minimum on time of the boost regulator and can be calculated using the following equation: VIN_MAX = VOUT × (1 − tMIN_ON × fSW) + IOUT_MIN × (RDSON_MAIN × (1 − tMIN_ON × fSW) + RL + tMIN_ON × fSW × RDSON_SYNC)/ (1 − tMIN_ON × fSW) where: VIN_MAX is the maximum input voltage. VOUT is the output voltage. tMIN_ON is the minimum on time. IOUT_MIN is the minimum output current. RDSON_MAIN is the main MOSFET on resistance. |
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