ADP5140WACCZ-R7 datasheet(43/128 Pages) AD

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Data Sheet

ADP5140

Rev. 0 | Page 43 of 128

The QA watchdog waits for the answer from the processor. When

the QA watchdog receives the answer from the processor, the

watchdog compares the answer to the internal answer. If the

two answers match, a good answer flag is set. If the two answers

do not match, a bad answer flag is set. The answer from the

processor must fit into the open window between tWD_QA_FAST, and

tWD_QA_SLOW as shown in Figure 87. The QA watchdog timer resets

when it gets a good answer or the watchdog timer expires (no good

feeding within tWD_QA_SLOW). A bad answer does not reset the QA

watchdog timer. The bad answer is treated as no feed.

tWD_QA_FAST

tWD_QA_SLOW

QA WATCHDOG

RESET

ANSWER FROM

PROCESSOR

READ TOKEN

TIME

WINDOW

OPEN

WINDOW

Figure 87. QA Watchdog Operation Sequence

QA Watchdog Fault Counter

The four possible QA watchdog fault situations include the

following:

•

The ADP5140 receives a good answer within the open

window. A good QA watchdog feed event occurs, and the

QA watchdog fault counter (QA_WD_

FAULT_COUNTER bits in the QA_WD_STATUS

•

The ADP5140 receives a good answer but the feeding time

is outside the open window. A bad QA watchdog feed event

occurs, and the QA watchdog fault counter increments.

•

The ADP5140 receives a bad answer, no matter if the

feeding time is within or outside the open window. This

instance is treated as a no feed event, and the QA

watchdog fault counter remains unchanged.

•

The ADP5140 receives no answer within the slow window

time. A bad QA watchdog feed event occurs, and the QA

watchdog fault counter increments.

If the QA watchdog fault counter value is equal to or higher

than the QA watchdog fault threshold value, a QA watchdog

fault event occurs, and the relevant QA watchdog fail bit in the

OTHER_STATUS register and OTHER_LATCH register is set.

The QA watchdog fault counter has overflow saturation and

underflow saturation. When the QA watchdog fault counter is

7, the counter remains at 7 if a bad QA watchdog feed event

occurs. When the QA watchdog fault counter is 0, the counter

remains at 0 if a good QA watchdog feed event occurs. The QA

watchdog fault counter resets when VAVIN is less than the UVLO

threshold or when the QA watchdog is re-enabled from the

disable status.

QA Watchdog Window Setting

tWD_QA_FAST and tWD_QA_SLOW are programmable through the SPI

and the equations are as follows:

tWD_QA_FAST = QA_WD_FAST_WINDOW × QA Time Tick

tWD_QA_SLOW = QA_WD_SLOW_WINDOW × QA Time Tick

where:

QA_WD_FAST_WINDOW is the value of the

QA_WD_FAST_WINDOW bits in the QA_WD_WINDOW

QA_WD_SLOW_WINDOW is the value of the

QA_WD_SLOW_WINDOW bits in the QA_WD_WINDOW

QA Time Tick is determined by the internal 2 MHz clock and

the QA scale factor, as follows:

QA Time Tick = QA_SCALE_FACTOR/2 MHz

where:

QA_SCALE_FACTOR depends on the QA_WD_PRE_SCALE

bits setting in the QA_WD_CTRL register. The default value of

the QA scale factor is 256, as shown in Table 31.

Table 31. QA Watchdog Scale Factor and Time Tick

QA_WD_PRE_SCALE,

Bits [1:0]

QA_SCALE_FACTOR

QA Time Tick (µs)

0.5

10 (Default)

256

128

4096

2048

The default values of tWD_QA_FAST and tWD_QA_SLOW are 0s and 1s,

respectively.

The QA watchdog needs 2× the QA time ticks duration time to

reset. Set tWD_QA_FAST and tWD_QA_SLOW to no less than 40× the QA

time ticks to keep the accuracy of the fast window and slow

window at less than 5%.

QA Watchdog Synchronization

The first feed signal is used for synchronization. As long as the

first feed signal is within the slow window, there is no increment or

decrement on the QA watchdog fault counter, and the QA

watchdog timer resets. If the first feed signal does not come

within the slow window, the QA watchdog timer expires and

resets, and the QA watchdog fault counter increments. The QA

watchdog still waits for the first feed signal and treats the first

feed signal as described in this section.

The QA_WD_TOKEN register and QA_WD_ANSWER

can be directly written or read without writing the correct key

to the PMIC_PSWD register.

Watchdog Parameters Configuration

Parameters related to the watchdogs can be programed through

the SPI, and the new value takes effect when the next feed signal

arrives.

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