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ADP5140WACCZ-R7 数据表(PDF) 63 Page - Analog Devices |
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ADP5140WACCZ-R7 数据表(HTML) 63 Page - Analog Devices |
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63 / 128 page  Data Sheet ADP5140 Rev. 0 | Page 63 of 128 Bits Bit Name Description Reset Access [1:0] COMM_MODE0_1 COMM_MODE30_31, COMM_MODE24_25, COMM_MODE6_7, and COMM_MODE0_1 are combined to setting the SPI communication mode. 0x0 R/W Mode 0 (Little Endian and MSB): COMM_MODE30_31 = 00, COMM_MODE24_25 = 00, COMM_MODE6_7 = 00, and COMM_MODE0_1 = 00. Mode 1 (Little Endian and LSB): COMM_MODE30_31 = 00, COMM_MODE24_25 = 00, COMM_MODE6_7 = 11, and COMM_MODE0_1 = 11. Mode 2 (Big Endian and MSB): COMM_MODE30_31 = 11, COMM_MODE24_25 = 11, COMM_MODE6_7 = 00, and COMM_MODE0_1 = 00. Mode 3 (Big Endian and LSB): COMM_MODE30_31 = 11, COMM_MODE24_25 = 11, COMM_MODE6_7 = 11, and COMM_MODE0_1 = 11. Table 35. CLR_SPI_CNT, Register Address: 0x0004 Bits Bit Name Description Reset Access [32:2] RESERVED Reserved. 0x0 R 1 SPI_WRCNT_CLR Write 1 to this bit to clear the SPI write counter. 0x0 R/W 0 SPI_RDCNT_CLR Write 1 to this bit to clear the SPI read counter. 0x0 R/W Table 36. CHIP_INFO1, Register Address: 0x0008 Bits Bit Name Description Reset Access [31:24] CHIP_TYPE These bits are used to determine the chip type of the ADP5140. The default value is 0xC. 0xC R [23:20] PRODUCT_GRADE These bits are used to determine the product grade of the ADP5140. The default value is 0x0. 0x0 R [19:16] DEVICE_REVISION These bits are used to determine the device revision of the ADP5140. The default value is 0x3. 0x3 R [15:8] PRODUCE_ID_UPBYTE These bits are combined with PRODUCT_ID_LOWBYTE to determine the product ID value. The default value is 0x51. 0x51 R [7:0] PRODUCE_ID_LOWBYTE These bits are combined with PRODUCT_ID_UPBYTE to determine the product ID value. The default value is 0x40. 0x40 R Table 37. CHIP_INFO2, Register Address: 0x000C Bits Bit Name Description Reset Access [31:24] RESERVED Reserved. 0x0 R [23:16] VENDOR_ID_HI These bits record the high byte of the vendor ID. 0x4 R [15:8] VENDOR_ID_LO These bits record the low byte of the vendor ID. 0x56 R [7:0] SPI_REVISION These bits record the revision number of the SPI. 0x0 R Table 38. SPI_CRC_PARAM, Register Address: 0x0010 Bits Bit Name Description Reset Access [31:16] SPI_CRC_SEED SPI Initial Seed Value for the CRC Calculation. 0x5555 R/W [15:0] SPI_CRC_POLY Polynomial Value for the CRC Calculation. 0x90D9 R/W |
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