ADP5140WACCZ-R7 datasheet(104/128 Pages) AD

104 / 128 page

ADP5140

Data Sheet

Rev. 0 | Page 104 of 128

Bits

Bit Name

Description

Reset

Access

1000: Address 3.

Other settings: invalid.

VIO

Record the I/O Voltage Configuration Information by the MODE Pin.

0x0

0: 1.8 V.

1: 3.3 V.

Table 77. FREQ_CONFG, Register Address: 0x8008

Bits

Bit Name

Description

Reset

Access

[31:10]

RESERVED

Reserved.

0x0

SP_EN

Enable Frequency Spread Spectrum.

0x0

R/W

0: disable the frequency spread spectrum.

1: enable the frequency spread spectrum.

[8:6]

Setting the Sweep Depth of the Frequency Spread Spectrum.

0x0

R/W

000: 2%.

001: 4%.

010: 6%.

011: 8%.

100: 10%.

Other settings: not supported.

[5:3]

Setting the Sweep Frequency of the Frequency Spread Spectrum.

0x0

R/W

000: 5 kHz.

001: 10.42 kHz.

010: 15.63 kHz.

011: 20.83 kHz.

100: 25 kHz.

101: 31.25 kHz.

110: 41.67 kHz.

111: 62.5 kHz.

SYNC_EN

Enable Sync Function.

0x0

R/W

0: the SYNC pin is high impedance, and the synchronization function disabled.

1: the synchronization function is enabled, and the SYNC pin direction is determined by the

SYNC_DIR bit.

SYNC_DIV

Setting Frequency on the SYNC Pin when Configured as an Output.

0x0

R/W

0: fSW.

1: fSW/5.

SYNC_DIR

Setting the SYNC Pin Direction.

0x0

R/W

0: configure as input.

1: configure as output.

ADP5140WACCZ-R7 数据表(PDF) 104 Page - Analog Devices

ADP5140WACCZ-R7 数据表(HTML) 104 Page - Analog Devices

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