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ADP5140WACCZ-R7 数据表(PDF) 112 Page - Analog Devices |
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ADP5140WACCZ-R7 数据表(HTML) 112 Page - Analog Devices |
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112 / 128 page  ADP5140 Data Sheet Rev. 0 | Page 112 of 128 Table 91. ERROR_COUNT, Register Address: 0x8040 Bits Bit Name Description Reset Access [31:6] RESERVED Reserved. 0x0 R [5:3] NEC_PER Set the Peripheral Error Counter Threshold (NEC_P). 0x7 R/W 000: 1. 001: 2. 010: 3. 011: 4. 100: 5. 101: 6. 110: 7. 111: 8. [2:0] NEC_SYS Set the System Error Counter Threshold (NEC_S). 0x7 R/W 000: 1. 001: 2. 010: 3. 011: 4. 100: 5. 101: 6. 110: 7. 111: 8. Table 92. SM_BIST_TRG, Register Address: 0x8044 Bits Bit Name Description Reset Access [31:1] RESERVED Reserved. 0x0 R 0 BIST_TRIG Diagnose Control Block SPI Trigger. Write 1 to trigger the BIST. 0x0 R/W Table 93. SM_BIST_STATUS, Register Address: 0x8048 Bits Bit Name Description Reset Access [31:16] RESERVED Reserved. 0x0 R 15 CLK_MON_PASS Clock Monitor Check During Self Check Process. 0x0 R 0: fail. 1: pass. 14 CRC_PASS CRC Check During Self Check Process. 0x0 R 0: fail. 1: pass. 13 ECC_PASS Error Correction Code (ECC) Check During Self Check Process. 0x0 R 0: fail. 1: pass. 12 OV_FAILURE_PASS Overvoltage Failure Check During Self Check Process. 0x0 R 0: fail. 1: pass. |
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