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CS5535 数据表(PDF) 277 Page - National Semiconductor (TI) |
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CS5535 数据表(HTML) 277 Page - National Semiconductor (TI) |
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277 / 555 page ![]() Revision 0.8 277 www.national.com USB Register Descriptions (Continued) 5.5.4 Host Controller Native Registers 5.5.4.1 Host Controller Revision (USBC_HcRevision) 5.5.4.2 Host Controller Control (USBC_HcControl) 8 SIE_PIPE_DIS SIE Pipeline Disable. When set, waits for all USB bus activity to complete prior to returning completion status to the List Processor. Should normally be cleared to 0. This is a fail-safe mechanism to avoid potential problems with the clk_dr transition between 1.5 MHz and 12 MHz. 7:1 RSVD Reserved. Write 0s; reads undefined. 0BUFF_SIZE Data Buffer Size. When set, the size of the region for the data buffer is 16 bytes. When clear, the size is 32 bytes. USB Memory Offset 00h Type HCD: HC: RO RO Reset Value 00000110h USBC_PCI_ASIC_MODE Bit Descriptions Bit Reset Description USBC_HcRevision Register Map 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 98 7654321 0 RSVD REV USBC_HcRevision Bit Descriptions Bit Name HCD HC Description 31:8 RSVD RO RO Reserved. Read/write 0s. 7:0 REV RO RO Revision (Read Only). Indicates the Open HCI Specification revision number implemented by the Hardware. USB supports 1.0a specification. (X.Y = XYh). USB Memory Offset 04h Type HCD: HC: R/W R/W Reset Value 00000000h USBC_HcControl Register Map 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 98 7654321 0 RSVD |
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