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CS5535 数据表(PDF) 304 Page - National Semiconductor (TI) |
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CS5535 数据表(HTML) 304 Page - National Semiconductor (TI) |
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304 / 555 page  www.national.com 304 Revision 0.8 DIVIL Register Descriptions (Continued) 53 MEM_LBAR_ DECODE_ ERR_FLAG Memory LBAR Decode Error Flag. If high, records that an ERR was generated due to a collision between one memory LBAR and another memory LBAR hit. In this case, NO chip select is generated and DECODE_ERR_FLAG (bit 33) is asserted. DECODE_ERR_EN (bit 1) must be high to generate ERR and set flag. Write 1 to clear; writing 0 has no effect. 52 IO_LBAR_ DECODE_ERR_ FLAG I/O LBAR Decode Error Flag. If high, records that an ERR was generated due to a col- lision between one I/O LBAR and another I/O LBAR hit. In this case, NO chip select is generated and DECODE_ERR_FLAG (bit 33) is asserted.DECODE_ERR_EN (bit 1) must be high to generate ERR and set flag. Write 1 to clear; writing 0 has no effect. 51:48 RSVD Reserved. Reads return 0. Writes have no effect. 47 SHTDWN_ ERR_FLAG Shutdown Error Flag. If high, records that an ERR was generated due to a Shutdown cycle occurrence. SHTDWN_ERR_EN (bit 15) must be high to generate ERR and set flag. Write 1 to clear; writing 0 has no effect. 46 NAND_DIST_ ERR_FLAG NAND Distract Error Flag. If high, records that an ERR was generated due to a NAND distract error. NAND_DIST_ERR_EN (bit 14) must be high to generate ERR and set flag. Write 1 to clear; writing 0 has no effect. 45 RSVD Reserved. Reads return 0. Writes have no effect. 44 DMA_DMA_ ERR_FLAG 8237 DMA Error Flag. If high, records that an ERR was generated due to an access on the 8237s during DMA. DMA_DMA_ERR_EN (bit 12) must be high to generate ERR and set flag. Write 1 to clear; writing 0 has no effect. 43 LPC_DMA_ ERR_FLAG LPC DMA Error Flag. If high, records that an ERR was generated due to an LPC access during DMA. LPC_DMA_ERR_EN (bit 11) must be high to generate ERR and set flag. Write 1 to clear; writing 0 has no effect. 42 RSVD Reserved. Reads return 0. Writes have no effect. 41 UART2_DMA_ ERR_FLAG UART2 DMA Error Flag. If high, records that an ERR was generated due to a UART2 access during DMA. UART2_DMA_ERR_EN (bit 9) must be high to generate ERR and set flag. Write 1 to clear; writing 0 has no effect. 40 UART1_DMA_ ERR_FLAG UART1 DMA Error Flag. If high, records that an ERR was generated due to a UART1 access during DMA. UART1_DMA_ERR_EN (bit 8) must be high to generate ERR and set flag. Write 1 to clear; writing 0 has no effect. 39:38 RSVD Reserved. Reads return 0. Writes have no effect. 37 LPC_MAST_ ERR_FLAG LPC Master Error Flag. If high, records that an ERR was generated on the LPC due to a Master <=> GeodeLink Adapter transaction. LPC_MAST_ERR_EN (bit 5) must be high to generate ERR and set flag. Write 1 to clear; writing 0 has no effect. 36 LPC_SLV_ ERR_FLAG LPC Slave Error Flag. If high, records that an ERR was generated on the LPC due to a Slave <=> GeodeLink Adapter transaction. LPC_SLV_ERR_EN (bit 4) must be high to generate ERR and set flag. Write 1 to clear; writing 0 has no effect. 35 MAST_RESP_ EXCEP_FLAG Master Response Exception Flag. If high, records that an ERR was generated due to the GeodeLink Adapter detecting the EXCEP bit set in a local bus master response packet. MAST_RESP_EXCP_EN (bit 3) must be high to generate ERR and set flag. Write 1 to clear; writing 0 has no effect. 34 REPEAT_SSMI_ ERR_FLAG Repeat SSMI Error Flag. If high, records that an ERR was generated due to a second SSMI occurring on an address before the first was cleared. REPEAT_SSMI_ERR_EN (bit 2) must be high to generate ERR and set flag. Write 1 to clear; writing 0 has no effect. 33 DECODE_ERR_ FLAG Decode Error Flag. If high, records that an ERR was generated during the address decode cycle due to one or more devices being decoded to the same address. Bits [54:52] record further information about this type of error. DECODE_ERR_EN (bit 1) must be high to generate ERR and set flag. Write 1 to clear; writing 0 has no effect. DIVIL_GLD_MSR_ERROR Bit Descriptions (Continued) Bit Name Description |
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