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CS5535 数据表(PDF) 116 Page - National Semiconductor (TI) |
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CS5535 数据表(HTML) 116 Page - National Semiconductor (TI) |
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116 / 555 page  www.national.com 116 Revision 0.8 SMB Controller Functional Description (Continued) Table 4-17. Comparison of SMB, I2C, and ACCESS.bus Symbol Parameter SMB I2C ACCESS.bus Min Max Min Max Min Max F Operating frequency 10 kHz 100 kHz 0 kHz 100 kHz 10 kHz 100 kHz TBUF Bus free time between STOP and START condition 4.7 µs 4.7 µs 4.7 µs THD:STA Hold time after (repeated) START condition. After this period the first clock is generated 4.0 µs 4.0 µs 4.0 µs TSU:STA Repeated START condition setup time 4.7 µs 4.7us 4.7 µs TSU:STO STOP condition setup time 4.0 µs 4.0us 4.0 µs THD:DAT Data hold time 300 ns 0 µs 3.45 µs 300 ns TSU:DAT Data setup time 250 ns 250 ns 250 ns TTimeout Detect clock low time-out 25 ms 35 ms 25 ms 35 ms TLOW Clock low period 4.7 µs 4.7 µs 4.7 µs THIGH Clock high period 4.0 µs 50 µs 4.0 µs 4.0 µs 50 µs TLOW:SEXT Cumulative clock low extend period (slave) 25 ms 25 ms TLOW:MEXT Cumulative clock low extend period (master) 10 ms 10 ms TF Clock/data fall time 300 ns 300 ns 300 ns TR Clock/data rise time 1000 ns 1000 ns 1000 ns TPOR Time that device must be opera- tional after power-on reset 500 ms VIL SMBus signal input low voltage 0.8V -0.5V 1.5V -0.5V 0.6V VIH SMBus signal input high voltage 2.1V VDD 3.0V 1.4V 5.5V VOL SMBus signal output low voltage 0.4V 0V 0.4V 0V 0.4V ILEAK_BUS Input leakage per bus segment +-200uA ILEAK_PIN Input leakage per device pin +-10 µA -10 µA +10 µA 10 µA VDD Nominal bus voltage 2.7V 5.5V 2.0V 5.0V IPULLUP Current sinking, VOL = 0.4V (SMBus) 4.0 mA 100 µA 350 µA CBUS Capacitive load per bus segment 400 pF CI Capacitance for SMBDAT or SMBCLK pin 10 pF 10 pF VNOISE Signal noise immunity from 10 to 100 MHz 300 mV p-p |
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