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GD32F310 数据表(PDF) 22 Page - GigaDevice Semiconductor (Beijing) Inc.

部件名 GD32F310
功能描述  Arm® Cortex®-M4 32-bit MCU
PDF  81 Pages
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制造商  GIGADEVICE [GigaDevice Semiconductor (Beijing) Inc.]
网页  http://www.gigadevice.com/
标志 GIGADEVICE - GigaDevice Semiconductor (Beijing) Inc.

GD32F310 数据表(HTML) 22 Page - GigaDevice Semiconductor (Beijing) Inc.

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GD32F310xx Datasheet
21
GD32F310Kx LQFP32
Pin Name
Pins
Pin
Type(1)
I/O
Level(2)
Functions description
Alternate:
TIMER2_CH3,
TIMER13_CH0,
TIMER0_CH2_ON, SPI1_SCK(4)
Additional: ADC_IN9
VSS
16
P
Default: VSS
VDD
17
P
Default: VDD
PA8
18
I/O
5VT
Default: PA8
Alternate:
USART0_CK,
TIMER0_CH0,
CK_OUT,
USART1_TX(3), EVENTOUT, CTC_SYNC
PA9
19
I/O
5VT
Default: PA9
Alternate:
USART0_TX,
TIMER0_CH1,
TIMER14_BRKIN(4), I2C0_SCL
PA10
20
I/O
5VT
Default: PA10
Alternate:
USART0_RX,
TIMER0_CH2,
TIMER16_BRKIN, I2C0_SDA
PA11
21
I/O
5VT
Default: PA11
Alternate: USART0_CTS, TIMER0_CH3, EVENTOUT,
SPI1_IO2(4)
PA12
22
I/O
5VT
Default: PA12
Alternate: USART0_RTS, TIMER0_ETI, EVENTOUT,
SPI1_IO3(4)
PA13
23
I/O
5VT
Default: PA13
Alternate: SWDIO
, IFRP_OUT, SPI1_MISO(4)
PA14
24
I/O
5VT
Default: PA14
Alternate: USART1_TX(3), SWCLK, SPI1_MOSI(4)
PA15
25
I/O
5VT
Default: PA15
Alternate:
SPI0_NSS,
I2S0_WS,
USART1_RX(3),
SPI1_NSS(4), EVENTOUT
PB3
26
I/O
5VT
Default: PB3
Alternate: SPI0_SCK, I2S0_CK, EVENTOUT
PB4
27
I/O
5VT
Default: PB4
Alternate:
SPI0_MISO,
I2S0_MCK,
TIMER2_CH0,
EVENTOUT
PB5
28
I/O
5VT
Default: PB5
Alternate:
SPI0_MOSI,
I2S0_SD,
I2C0_SMBA,
TIMER15_BRKIN, TIMER2_CH1
Additional: WKUP5
PB6
29
I/O
5VT
Default: PB6
Alternate: I2C0_SCL, USART0_TX, TIMER15_CH0_ON
PB7
30
I/O
5VT
Default: PB7
Alternate:I2C0_SDA, USART0_RX,TIMER16_CH0_ON
BOOT0
31
I
Default: BOOT0
VSS
32
P
Default: VSS
Notes:
(1) Type: I = input, O = output, P = power.



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