数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

GD32F310 数据表(PDF) 54 Page - GigaDevice Semiconductor (Beijing) Inc.

部件名 GD32F310
功能描述  Arm® Cortex®-M4 32-bit MCU
PDF  81 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  GIGADEVICE [GigaDevice Semiconductor (Beijing) Inc.]
网页  http://www.gigadevice.com/
标志 GIGADEVICE - GigaDevice Semiconductor (Beijing) Inc.

GD32F310 数据表(HTML) 54 Page - GigaDevice Semiconductor (Beijing) Inc.

Back Button GD32F310 Datasheet HTML 50Page - GigaDevice Semiconductor (Beijing) Inc. GD32F310 Datasheet HTML 51Page - GigaDevice Semiconductor (Beijing) Inc. GD32F310 Datasheet HTML 52Page - GigaDevice Semiconductor (Beijing) Inc. GD32F310 Datasheet HTML 53Page - GigaDevice Semiconductor (Beijing) Inc. GD32F310 Datasheet HTML 54Page - GigaDevice Semiconductor (Beijing) Inc. GD32F310 Datasheet HTML 55Page - GigaDevice Semiconductor (Beijing) Inc. GD32F310 Datasheet HTML 56Page - GigaDevice Semiconductor (Beijing) Inc. GD32F310 Datasheet HTML 57Page - GigaDevice Semiconductor (Beijing) Inc. GD32F310 Datasheet HTML 58Page - GigaDevice Semiconductor (Beijing) Inc. Next Button
Zoom Inzoom in Zoom Outzoom out
 54 / 81 page
background image
GD32F310xx Datasheet
53
Symbol
Parameter
Conditions
Min
Typ
Max Unit
DIRC48M(2) IRC48M oscillator duty cycle
VDD = VDDA = 3.3 V
45
50
55
%
IDDAIRC48M(1)
IRC48M oscillator operating
current
VDD = VDDA = 3.3 V
—
238
—
μA
tSUIRC48M(1)
IRC48M oscillator startup
time
VDD = VDDA = 3.3 V
—
1.3
—
μs
(1)
Based on characterization, not tested in production.
(2)
Guaranteed by design, not tested in production.
4.9
PLL characteristics
Table 4-22. PLL characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
fPLLIN(1)
PLL input clock frequency
—
1
—
25
MHz
fPLLOUT(2)
PLL output clock frequency
—
16
—
72
MHz
fVCO(2)
PLL VCO output clock
frequency
—
—
—
72
MHz
tLOCK(2)
PLL lock time
—
—
—
300
μs
IDDA(1) (3)
Current consumption on
VDDA
VCO freq = 72 MHz
—
210
—
μA
JitterPLL(4)
Cycle to cycle Jitter
(rms)
System clock
—
32.1
—
ps
Cycle to cycle Jitter
(peak to peak)
—
255.6
—
(1)
Based on characterization, not tested in production.
(2)
Guaranteed by design, not tested in production.
(3)
System clock = IRC8M = 8 MHz,
fPLLOUT = 72 MHz.
(4)
Value given with main PLL running.
4.10
Memory characteristics
Table 4-23 Flash memory characteristics(1)
Symbol
Parameter
Conditions
Min(1) Typ(1)
Max(1)
Unit
PECYC
Number of guaranteed
program /erase cycles before
failure (Endurance)
—
100
—
—
kcycles
tREAD
Read time at code flash area
—
1
—
hclks
Read time at data flash area
56
—
3536
tRET
Data retention time
—
—
20
—
years
tPROG
Word programming time
TA range(2)
—
37.5
86
μs
tERASE
Page erase time
—
45
300
ms
tMERASE(64KB)
Mass erase time
—
0.5
1.6
s
(1)
Guaranteed by design and/or characterization, not 100% tested in production
.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com