GD32F310 datasheet(25/81 Pages) GIGADEVICE

25 / 81 page

GD32F310xx Datasheet

GD32F310KxU6 QFN32

Pin Name

Pins

Type(1)

I/O

Level(2)

Functions description

BOOT0

Default: BOOT0

PB8

I/O

5VT

Default: PB8

Alternate: I2C0_SCL, TIMER15_CH0

Notes:

(1) Type: I = input, O = output, P = power.

(2) I/O Level: 5VT = 5 V tolerant.

(3) Functions are available on GD32F310K8/6 devices.

(4) Functions are available on GD32F310K8 devices only.

2.6.4

GD32F310Gx QFN28 pin definitions

Table 2-7. GD32F310Gx QFN28 pin definitions

GD32F310Gx QFN28

Pin Name

Pins

Type(1)

I/O

Level(2)

Functions description

BOOT0

Default: BOOT0

PF0-OSCIN

I/O

5VT

Default: PF0

Alternate: CTC_SYNC

Additional: OSCIN

PF1-

OSCOUT

I/O

5VT

Default: PF1

Additional: OSCOUT

NRST

I/O

Default: NRST

VDDA

Default: VDDA

PA0-WKUP

I/O

Default: PA0

Alternate: USART1_CTS, I2C1_SCL

Additional: ADC_IN0, RTC_TAMP1, WKUP0

PA1

I/O

Default: PA1

Alternate: USART1_RTS, I2C1_SDA, EVENTOUT

Additional: ADC_IN1

PA2

I/O

Default: PA2

Alternate: USART1_TX, TIMER14_CH0

Additional: ADC_IN2

PA3

I/O

Default: PA3

Alternate: USART1_RX, TIMER14_CH1

Additional: ADC_IN3

PA4

I/O

Default: PA4

Alternate:

SPI0_NSS,

I2S0_WS,

USART1_CK,

TIMER13_CH0, SPI1_NSS

Additional: ADC_IN4

PA5

I/O

Default: PA5

Alternate: SPI0_SCK, I2S0_CK

Additional: ADC_IN5

PA6

I/O

Default: PA6

GD32F310 数据表(PDF) 25 Page - GigaDevice Semiconductor (Beijing) Inc.

GD32F310 数据表(HTML) 25 Page - GigaDevice Semiconductor (Beijing) Inc.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81

数据表下载