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GD32F310 数据表(PDF) 55 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD32F310 数据表(HTML) 55 Page - GigaDevice Semiconductor (Beijing) Inc. |
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55 / 81 page ![]() GD32F310xx Datasheet 54 (2) For grade 6 devices, TA range= -40°C ~ +85°C. For grade 7 devices, TA range= -40°C ~ +105°C. 4.11 NRST pin characteristics Table 4-24. NRST pin characteristics Symbol Parameter Conditions Min Typ Max Unit VIL(NRST)(1) NRST Input low level voltage 2.6 V ≤ VDD = VDDA ≤ 3.6 V -0.5 — 0.3 VDD V VIH(NRST)(1) NRST Input high level voltage 0.7 VDD — VDD + 0.5 Vhyst(2) Schmidt trigger Voltage hysteresis — 360 — mV Rpu(2) Pull-up equivalent resistor — — 40 — kΩ (1) Based on characterization, not tested in production. (2) Guaranteed by design, not tested in production. Figure 4-4. Recommended external NRST pin circuit(1) NRST VDD Ext ernal reset circuit RPU 10 k Ω VDD GND 100 nF K (1) Unless the voltage on NRST pin go below VIL(NRST) level, the device would not generate a reliable reset. 4.12 GPIO characteristics Table 4-25. I/O port DC characteristics(1)(3) Symbol Parameter Conditions Min Typ Max Unit VIL Standard IO Low level input voltage 2.6 V ≤ VDD = VDDA ≤ 3.6 V — — 0.3 VDD V 5V-tolerant IO Low level input voltage 2.6 V ≤ VDD = VDDA ≤ 3.6 V — — 0.3 VDD V VIH Standard IO High level input voltage 2.6 V ≤ VDD = VDDA ≤ 3.6 V 0.7 VDD — — V 5V-tolerant IO High level input voltage 2.6 V ≤ VDD = VDDA ≤ 3.6 V 0.7 VDD — — V VOL Low level output voltage for 8 IO Pins (each IIO = +8 mA) VDD = 2.6 V — 0.14 — V VDD = 3.3 V — 0.13 — VDD = 3.6 V — 0.12 — |
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