GD32F310 datasheet(37/81 Pages) GIGADEVICE

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GD32F310xx Datasheet



16-bit, motor control PWM advanced timer with programmable dead-time generation for

output match



Encoder interface controller with two inputs using quadrature decoder



24-bit SysTick timer down counter



2 watchdog timers (free watchdog timer and window watchdog timer)

The advanced timer (

TIMER0) can be used as a three-phase PWM multiplexed on 6 channels.

It has complementary PWM outputs with programmable dead-time generation. It can also be

used as a complete general timer. The 4 independent channels can be used for input capture,

output compare, PWM generation (edge-aligned or center-aligned mode) and single pulse

mode output.

If configured as a general 16-bit timer, it has the same functions as the TIMERx

timer. It can be synchronized with external signals or to interconnect with other general timers

together which have the same architecture and features.

The general timer can be used for a variety of purposes including general time, input signal

pulse width measurement or output waveform generation such as a single pulse generation

or PWM output, up to 4 independent channels for input capture/output compare. TIMER2 is

based on a 16-bit auto-reload up/downcounter and a 16-bit prescaler. TIMER13 ~ TIMER16

is based on a 16-bit auto-reload upcounter and a 16-bit prescaler. The general timer also

supports an encoder interface with two inputs using quadrature decoder.

The GD32F310xx have two watchdog peripherals, free watchdog and window watchdog.

They offer a combination of high safety level, flexibility of use and timing accuracy.

The free watchdog timer includes a 12-bit down-counting counter and an 8-bit prescaler. It is

clocked from an independent 40 KHz internal RC and as it operates independently of the

main clock, it can operate in deep-sleep and standby modes. It can be used either as a

watchdog to reset the device when a problem occurs, or as a free-running timer for application

timeout management.

The window watchdog is based on a 7-bit down counter that can be set as free-running. It

can be used as a watchdog to reset the device when a problem occurs. It is clocked from the

main clock. It has an early wakeup interrupt capability and the counter can be frozen in debug

mode.

The SysTick timer is dedicated for OS, but could also be used as a standard down counter.

The features are shown below:



A 24-bit down counter



Auto reload capability



Maskable system interrupt generation when the counter reaches 0



Programmable clock source

3.10

Real time clock (RTC)



Independent binary-coded decimal (BCD) format timer/counter with five 32-bit backup

registers.

GD32F310 数据表(PDF) 37 Page - GigaDevice Semiconductor (Beijing) Inc.

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