ST52T301 datasheet(21/100 Pages) STMICROELECTRONICS

21 / 100 page

3 EPROM

The EPRO M memor y provides an on-chip

user-programmable non-volatile memory, that

allows fast and reliable storage of user data.

There are 16K bits of memory space with an 8-bit

internal parallelism (2Kbytes) addressed by an

11-bit bus. The data bus is of 8 bits.

The memory has a double supply: VPP is equal to

12V

±5% in Programming Phase and 5V±10%

during Working Phase.VDD is equal to 5V

±10%.

The EPROM memory of ST52x301 is divided in

three main blocks (see Figure 3.1):

Mbfs Setting with (0 through 191) contains the

coordinates of the vertexes of every Mbf defined

in the program.

Interrupt Vectors (192 through 201) contain the

addresses for the interrupt routines.

Each address is composed of two bytes.

Program Instruction Set (202 through 2048)

contains the instruction set of the user program.

It can be composed of more Boolean and Fuzzy

Algorithms

The operation that can be performed, during

Programming Phase, on the EPROM are: Writing,

Verify, Writing Inhibit, Standby and Erasing.

Fi gure 3 . 2 s h ow s t he s i gnals t im in g i n

Programming Mode.

192

191

202

201

2048

Mbfs Setting

Interrupt Vectors

Program

InstructionsSet

Boolean Algorithm

Fuzzy Algorithm

·· · · · ·

INT_EXT

INT_TRIAC

INT_TIMER

INT_SCI

INT_ADC

Mbf Parameters

Figure 3.1. Memory Map

3.1 EPROM Programming Phase Procedure

Programming mode is selected by ap plying

12V

±5% voltage to the VPP pin and set the control

signal as following:

RESET: 0, TEST: 0, MODE: 1.

CADD, ERES, OE and CE are the control signals

used during the Programming Mode. CADD is

active on edge, the others are active on level (OE,

CE are active low, ERES is active high).

3.1.1 EPROM Writing

When the memory is blank, all the bits are at logic

level ”1”. The data are introduced by programming

only the zeros in the desired memory location;

however all input data must contain both ”1” and

”0”.

The only way to change ”0” into ”1” is to erase the

whole memory ( by exposure to Ultra Violet light)

and reprogram it.

The memory is in Writing mode when:

CE = LOW

OE = HIGH

with stable data on the data bus P(0:7).

The total programming pulse width (CE = 0 V) is,

typically, 50

µs (by means of 5 pulses of 10 µs), but

beforeactivating such pulse, it is suggested to wait

for at least 2

µs after VPP rises at 12 V . After the

disactivation of the pulse it is suggested to wait for

21/99

ST52T301/E301

ST52T301 数据表(PDF) 21 Page - STMicroelectronics

ST52T301 数据表(HTML) 21 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100

数据表下载