ST52T301 datasheet(39/100 Pages) STMICROELECTRONICS

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ST52T301 数据表(PDF) 39 Page - STMicroelectronics

部件名	ST52T301

功能描述	8-Bit OTP/EPROM DuaLogic] MCUs WITH ADC, UART, TIMER, TRIAC & PWM DRIVER

PDF	100 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

标志

39 / 100 page

8.3 OUTPUT HANDSHAKE

Figure 8.7 illustrates the timing associated with the

READY Handshake signal, when the instruction

LDPR 2 reg is performed.

When READY is reset no significantdata are on the

output port pins, because ST52x301 is writing into

the PERIPH_REG_2.

When the data is ready in PERIPH_REG_2,

READY signal is set.

The rising edge of READY signal can be used as a

latching signal.

No peripheral acknowledge is waited for.

If the signal READY is high, it means that the data

out is still not read.In this case, the following LDPR

instruction is stored in a one register peripheral

stack.

If the READY is maintained high, the following

LDPR instructions store the data coming from the

Registers File on the same register stack.

Figure 8.6. One Line Output Handshake

Figure 8.7. One Line Output Handshake Timing

39/99

ST52T301/E301

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