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ST52T301 数据表(PDF) 28 Page - STMicroelectronics

部件名 ST52T301
功能描述  8-Bit OTP/EPROM DuaLogic] MCUs WITH ADC, UART, TIMER, TRIAC & PWM DRIVER
PDF  100 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST52T301 数据表(HTML) 28 Page - STMicroelectronics

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6. A/D CONVERTER
The A/D Converter of ST52x301 is an 8-bit analog
to digital converter with up to 4 analog inputs
offering 8 bit resolution with a total accuracy of 2
LSB and a typical conversion time of 32
µs.
The conversion range is 0 - 2.5 V.
The A/D peripheral converts the input voltage with
a process of successive approximations using a
fixed clock frequency derived from the oscillator.
The ADC uses 5 registers: one Configuration
Register, REG_CONF2, and four Data Registers.
These 4 registers are the first 4 Input Registers.
The A/D converter drives the analog Multiplexer in
order to sequentially pick up the external inputs to
be put in output and stored automatically in 4 8-bit
registers.
It is possibile to configurethe Multiplexer by means
of the register REG_CONF2, in order to select the
number of analog inputs to convert.
For example, if the bit 3 and bit 2 of REG_CONF2
are configured at 10, then the Multiplexer will
sequentially pick up only the inputs 0,1 and 2.
Tab le 6.1 shows the conver tion sequences
according to the possible values of the two bit
REG_CONF2 (3:2).
The A/D Converter, at the end of the conversion,
will send a signal (end-of-conversion)which can be
used like an interrupt signal. The user can select
the priority of the A/D interrupt and mask it (see
”Interrupt Routine” chapter)
Th e
co nve rs io n
s ta r t s
w rit i ng
”1”
on
REG_CONF2(0). The A/D is reset by writing ”0” in
REG_CONF2(0).
The converted data are automaticallystored in four
8-bit Input Registers.
By performing an instruction:
LDRI regj ingi
the analog input ”ingi” is loaded in the register”regj”
of the Register File.
Figure 6.1. A/D Converter Structure
CONF_REG2 (3:2)
INPUT SEQUENCE
00
Ain0
01
Ain 0, Ain1
10
Ain 0, Ain 1, Ain 2
11
Ain 0, Ain 1, Ain 2, Ain 3
Table 6.1.
28/99
ST52T301/E301



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