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ST92F120JR9T 数据表(PDF) 64 Page - STMicroelectronics |
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ST92F120JR9T 数据表(HTML) 64 Page - STMicroelectronics |
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64 / 320 page  64/320 ST92F120 - REGISTER AND MEMORY MAP Table 17. Detailed Register Map Page (Dec) Block Reg. No. Register Name Description Reset Value Hex. Doc. Page N/A Core R230 CICR Central Interrupt Control Register 87 28 R231 FLAGR Flag Register 00 29 R232 RP0 Pointer 0 Register xx 31 R233 RP1 Pointer 1 Register xx 31 R234 PPR Page Pointer Register xx 33 R235 MODER Mode Register E0 33 R236 USPHR User Stack Pointer High Register xx 35 R237 USPLR User Stack Pointer Low Register xx 35 R238 SSPHR System Stack Pointer High Reg. xx 35 R239 SSPLR System Stack Pointer Low Reg. xx 35 I/O Port 0:5 R224 P0DR Port 0 Data Register FF 123 R225 P1DR Port 1 Data Register FF R226 P2DR Port 2 Data Register FF R227 P3DR Port 3 Data Register FF R228 P4DR Port 4 Data Register FF R229 P5DR Port 5 Data Register FF 0 INT R242 EITR External Interrupt Trigger Register 00 83 R243 EIPR External Interrupt Pending Reg. 00 84 R244 EIMR External Interrupt Mask-bit Reg. 00 84 R245 EIPLR External Interrupt Priority Level Reg. FF 84 R246 EIVR External Interrupt Vector Register x6 135 R247 NICR Nested Interrupt Control 00 85 WDT R248 WDTHR Watchdog Timer High Register FF 134 R249 WDTLR Watchdog Timer Low Register FF 134 R250 WDTPR Watchdog Timer Prescaler Reg. FF 134 R251 WDTCR Watchdog Timer Control Register 12 134 R252 WCR Wait Control Register 7F 135 2 I/O Port 0 R240 P0C0 Port 0 Configuration Register 0 00 123 R241 P0C1 Port 0 Configuration Register 1 00 R242 P0C2 Port 0 Configuration Register 2 00 I/O Port 1 R244 P1C0 Port 1 Configuration Register 0 00 R245 P1C1 Port 1 Configuration Register 1 00 R246 P1C2 Port 1 Configuration Register 2 00 I/O Port 2 R248 P2C0 Port 2 Configuration Register 0 FF R249 P2C1 Port 2 Configuration Register 1 00 R250 P2C2 Port 2 Configuration Register 2 00 I/O Port 3 R252 P3C0 Port 3 Configuration Register 0 FE R253 P3C1 Port 3 Configuration Register 1 00 R254 P3C2 Port 3 Configuration Register 2 00 9 |
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