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数据搜索系统，热门电子元器件搜索 |
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ST92F120JR9T 数据表(PDF) 68 Page - STMicroelectronics |
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ST92F120JR9T 数据表(HTML) 68 Page - STMicroelectronics |
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68 / 320 page  68/320 ST92F120 - REGISTER AND MEMORY MAP 23 JBLPD R240 STATUS Status Register 40 264 R241 TXDATA Transmit Data Register xx 265 R242 RXDATA Receive Data Register xx 266 R243 TXOP Transmit Opcode Register 00 266 R244 CLKSEL System Frequency Selection Register 00 271 R245 CONTROL Control Register 40 271 R246 PADDR Physiscal Address Register xx 272 R247 ERROR Error Register 00 273 R248 IVR Interrupt Vector Register xx 275 R249 PRLR Priority Level Register 10 275 R250 IMR Interrupt Mask Register 00 275 R251 OPTI ONS Options and Register Group Selection 00 277 R252 CREG0 Current Register 0 xx 279 R253 CREG1 Current Register 1 xx 279 R254 CREG2 Current Register 2 xx 279 R255 CREG3 Current Register 4 xx 279 24 SCI0 R240 RDCPR0 Receiver DMA Transaction Counter Pointer xx 199 R241 RDAPR0 Receiver DMA Source Address Pointer xx 199 R242 TDCPR0 Transmitter DMA Transaction Counter Pointer xx 199 R243 TDAPR0 Transmitter DMA Destination Address Pointer xx 199 R244 S_IVR0 Interrupt Vector Register xx 201 R245 ACR0 Address/Data Compare Register xx 201 R246 IMR0 Interrupt Mask Register x0 201 R247 S_ISR0 Interrupt Status Register xx 201 R248 RXBR0 Receive Buffer Register xx 203 R248 TXBR0 Transmitter Buffer Register xx 203 R249 IDPR0 Interrupt/DMA Priority Register xx 204 R250 CHCR0 Character Configuration Register xx 205 R251 CCR0 Clock Configuration Register 00 206 R252 BRGHR0 Baud Rate Generator High Reg. xx 207 R253 BRGLR0 Baud Rate Generator Low Register xx 207 R254 SICR0 Synchronous Input Control 03 207 R255 SOCR0 Synchronous Output Control 01 208 Page (Dec) Block Reg. No. Register Name Description Reset Value Hex. Doc. Page 9 |
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