ST92F120JR9T datasheet(47/320 Pages) STMICROELECTRONICS

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ST92F120 - SINGLE VOLTAGE FLASH & EEPROM

3.3 REGISTER DESCRIPTION

3.3.1 Control Registers

FLASH CONTROL REGISTER (FCR)

Address: 224000h - Read/Write

Reset value: 0000 0000 (00h)

The Flash Control Register is used to enable all

the operations for the Flash and the TestFlash

memories, but also for the two dedicated EEP-

ROM sectors F4/E0 and F5/E1 if they are ad-

dressed directly when using software EEPROM

emulation (the FCR register must be used in this

case only to select operations, while the ECR reg-

ister must still be used to start the operation with

the EWMS bit). The write access to the TestFlash

is possible only in test mode, except the OTP area

of the TestFlash that can be programmed in user

mode (but not erased).

Bit 7 = FWMS:

Flash Write Mode Start (Read/

Write).

This bit must be set to start every write/erase oper-

ation in Flash memory. At the end of the write/

erase operation or during a Sector Erase Suspend

this bit is automatically reset. To resume a sus-

pended Sector Erase operation, this bit must be

set again. Resetting this bit by software does not

stop the current write operation.

0: No effect

1: Start Flash write

Bit 6 = FPAGE:

Flash Page program (Read/Write).

This bit must be set to select the Page Program

operation in Flash memory. The Page Program

operation allows to program “0”s in place of “1”s.

From 1 to 16 bytes can be entered (in any order,

no need for an ordered address sequence) before

starting the execution by setting the FWMS bit . All

the addresses must belong to the same page (only

the 4 LSBs of address can change). Data to be

programmed and addresses in which to program

must be provided (through an LD instruction, for

example). Data contained in page addresses that

are not entered are left unchanged. This bit is au-

tomatically reset at the end of the Page Program

operation.

0: Deselect page program

1: Select page program

Bit 5 = FCHIP:

Flash CHIP erase (Read/Write).

This bit must be set to select the Chip Erase oper-

ation in Flash memory. The Chip Erase operation

allows to erase all the Flash locations to FFh. The

operation is limited to Flash code (sectors F0-F3;

TestFlash and EEPROM sectors excluded). The

execution starts by setting the FWMS bit. It is not

necessary to pre-program the sectors to 00h, be-

cause this is done automatically. This bit is auto-

matically reset at the end of the Chip Erase opera-

tion.

0: Deselect chip erase

1: Select chip erase

Bit 4 = FBYTE:

Flash byte program (Read/Write).

This bit must be set to select the Byte Program op-

eration in Flash memory. The Byte Program oper-

ation allows “0”s to be programmedin place of “1”s.

Data to be programmed and an address in which

to program must be provided (through an LD in-

struction, for example) before starting execution

by setting bit FWMS. This bit is automatically reset

at the end of the Byte Program operation.

0: Deselect byte program

1: Select byte program

Bit 3 = FSECT:

Flash sector erase (Read/Write).

This bit must be set to select the Sector Erase op-

eration in Flash memory. The Sector Erase opera-

tion erases all the Flash locations to FFh. From 1

to 4 sectors (F0, ..,F3) can be simultaneously

erased, while TF, F4, F5 must be individually

erased. Sectors to be simultaneously erased can

be entered before starting the execution by setting

the FWMS bit. An address located in the sector to

erase must be provided (through an LD instruc-

tion, for example), while the data to be provided is

don’t care. It is not necessary to pre-program the

sectors to 00h, because this is done automatically.

This bit is automatically reset at the end of the

Sector Erase operation.

0: Deselect sector erase

1: Select sector erase

Bit 2 = FSUSP:

Flash sector erase suspend

(Read/Write).

This bit must be set to suspend the current Sector

Erase operation in Flash memory in order to read

data to or from program data to a sector not being

erased. The Erase Suspend operation resets the

Flash memory to normal read mode (automatically

resetting bit FBUSY) in a maximum time of 15

µs.

765

432

FWM

FPAG

FCHI

FBYT

FSEC

FSUS

PROT

FBUS

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