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ST92F120JR9T 数据表(PDF) 71 Page - STMicroelectronics |
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ST92F120JR9T 数据表(HTML) 71 Page - STMicroelectronics |
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71 / 320 page  71/320 ST92F120 - REGISTER AND MEMORY MAP Note: xx denotes a byte with an undefined value, however some of the bits may have defined values. Refer to register description for details. 61 A/D 1 R240 D0R1 Channel 0 Data Register xx 288 R241 D1R1 Channel 1 Data Register xx 288 R242 D2R1 Channel 2 Data Register xx 288 R243 D3R1 Channel 3 Data Register xx 288 R244 D4R1 Channel 4 Data Register xx 288 R245 D5R1 Channel 5 Data Register xx 288 R246 D6R1 Channel 6 Data Register xx 288 R247 D7R1 Channel 7 Data Register xx 288 R248 LT6R1 Channel 6 Lower Threshold Reg. xx 289 R249 LT7R1 Channel 7 Lower Threshold Reg. xx 289 R250 UT6R1 Channel 6 Upper Threshold Reg. xx 289 R251 UT7R1 Channel 7 Upper Threshold Reg. xx 289 R252 CRR1 Compare Result Register 0F 289 R253 CLR1 Control Logic Register 00 290 R254 AD_ICR1 Interrupt Control Register 0F 291 R255 AD_IVR1 Interrupt Vector Register x2 291 63 A/D 0 R240 D0R0 Channel 0 Data Register xx 288 R241 D1R0 Channel 1 Data Register xx 288 R242 D2R0 Channel 2 Data Register xx 288 R243 D3R0 Channel 3 Data Register xx 288 R244 D4R0 Channel 4 Data Register xx 288 R245 D5R0 Channel 5 Data Register xx 288 R246 D6R0 Channel 6 Data Register xx 288 R247 D7R0 Channel 7 Data Register xx 288 R248 LT6R0 Channel 6 Lower Threshold Reg. xx 289 R249 LT7R0 Channel 7 Lower Threshold Reg. xx 289 R250 UT6R0 Channel 6 Upper Threshold Reg. xx 289 R251 UT7R0 Channel 7 Upper Threshold Reg. xx 289 R252 CRR0 Compare Result Register 0F 289 R253 CLR0 Control Logic Register 00 290 R254 AD_ICR0 Interrupt Control Register 0F 291 R255 AD_IVR0 Interrupt Vector Register x2 291 Page (Dec) Block Reg. No. Register Name Description Reset Value Hex. Doc. Page 9 |
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