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ST92F120JR9T 数据表(PDF) 89 Page - STMicroelectronics |
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ST92F120JR9T 数据表(HTML) 89 Page - STMicroelectronics |
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89 / 320 page ![]() 89/320 ST92F120 - INTERRUPTS WAKE-UP / INTERRUPT LINES MANAGEMENT UNIT (Cont’d) 5.11.3.4 NMI Pin Management On the CPU side, if TLTEV=1 (Top Level Trigger Event, bit 3 of register R246, page 0) then a rising edge on the NMI pin will set the TLIP bit (Top Level Interrupt Pending bit, R230.6). At this point an in- terrupt request to the CPU is given either if TL- NM=1 (Top Level Not Maskable bit, R247.7 - once set it can only be cleared by RESET) or if TLI=1 and IEN=1 (bits R230.5, R230.4). Assuming that the application uses a non-maska- ble Top Level Interrupt (TLNM=1): in this case, whenever a rising edge occurs on the NMI pin, the related service routine will be executed. To service further Top Level Interrupt Requests, it is neces- sary to generate a new rising edge on the external NMI pin. The following summarizes some typical cases: – If the ST9 is in STOP mode and a rising edge on the NMI pin occurs, the ST9 will exit STOP mode and the NMI service routine will be exe- cuted. – If the ST9 is in Run mode and a rising edge oc- curs on the NMI pin: the NMI service routine is executed and then the ST9 restarts the execu- tion of the main program. Now, suppose that the user wants to enter STOP mode with NMI still at 1. The ST9 will not enter STOP mode and it will not execute an NMI routine be- cause there were no transitions on the exter- nal NMI line. – If the ST9 is in run mode and a rising edge on NMI pin occurs during the STOP bit setting se- quence: the NMI interrupt will be acknowledged and the ST9 will not enter STOP mode. At the end of the NMI routine, the user must re-enter the sequence: if NMI is still high at the end of the sequence, the ST9 can not enter STOP mode (see previous case). – If the ST9 is in run mode and the NMI pin is high: if NMI is forced low just before the third write in- struction of the STOP bit setting sequence then the ST9 will enter STOP mode. 9 |
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