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R8C/2G 数据表(PDF) 102 Page - Renesas Technology Corp |
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R8C/2G 数据表(HTML) 102 Page - Renesas Technology Corp |
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102 / 344 page ![]() R8C/2G Group 8. I/O Ports Rev.1.00 Apr 04, 2008 Page 82 of 318 REJ09B0387-0100 X: 0 or 1 NOTE: 1. Pulled up by setting the PU14 bit in the PUR1 register to 1. X: 0 or 1 NOTES: 1. Pulled up by setting the PU14 bit in the PUR1 register to 1. 2. N-channel open-drain output by setting the NCH bit in the U2C0 register to 1. NOTE: 1. Pulled up by setting the PU15 bit in the PUR1 register to 1. X: 0 or 1 NOTE: 1. Pulled up by setting the PU15 bit in the PUR1 register to 1. X: 0 or 1 NOTE: 1. Pulled up by setting the PU15 bit in the PUR1 register to 1. Table 8.29 Port P6_0/TREO Register PD6 PINSR4 PINSR3 TRECR1 Function Bit PD6_0 TREOSEL2 TREOSEL TOENA Setting value 0 Other than 001b Input port(1) 1 Other than 001b Output port X 001 TREO output Table 8.30 Port P6_3/TXD2 Register PD6 U2MR Function Bit PD6_3 SMD2 SMD1 SMD0 Setting value 000 0 Input port(1) 1 0 0 0 Output port X 0 0 1 TXD2 output(2) 1 0 1 10 Table 8.31 Port P6_4/RXD2 Register PD6 Function Bit PD6_4 Setting value 0 Input port(1) 1 Output port 0 RXD2 input(1) Table 8.32 Port P6_5/CLK2/(TREO) Register PD6 PINSR4 TRECR1 U2MR Function Bit PD6_5 TREOSEL2 TOENA CKDIR SMD2 SMD1 SMD0 Setting value 00 X 0 Other than 001b Input port(1) 1X X X 1 0 X X Other than 001b Output port X 0 X 0001 CLK2 output 00 X 1 X X X CLK2 input(1) X 1 1 X X X X TREO output Table 8.33 Port P6_6/(KI1) Register PD6 PINSR4 INTEN Function Bit PD6_6 KI1SEL INT0EN Setting value 0X0 Input port(1) 1 X 0 Output port 01 1 KI1 input(1) |
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