R8CSLASH2G datasheet(129/344 Pages) RENESAS

129 / 344 page

R8C/2G Group

13. Interrupts

Rev.1.00

Apr 04, 2008

Page 109 of 318

REJ09B0387-0100

13.1.2

Software Interrupts

A software interrupt is generated when an instruction is executed. Software interrupts are non-maskable.

13.1.2.1

Undefined Instruction Interrupt

The undefined instruction interrupt is generated when the UND instruction is executed.

13.1.2.2

Overflow Interrupt

The overflow interrupt is generated when the O flag is set to 1 (arithmetic operation overflow) and the INTO

instruction is executed. Instructions that set the O flag are: ABS, ADC, ADCF, ADD, CMP, DIV, DIVU, DIVX,

NEG, RMPA, SBB, SHA, and SUB.

13.1.2.3

BRK Interrupt

A BRK interrupt is generated when the BRK instruction is executed.

13.1.2.4

INT Instruction Interrupt

An INT instruction interrupt is generated when the INT instruction is executed. The INT instruction can select

software interrupt numbers 0 to 63. Software interrupt numbers 3 to 31 are assigned to the peripheral function

interrupt. Therefore, the MCU executes the same interrupt routine when the INT instruction is executed as

when a peripheral function interrupt is generated. For software interrupt numbers 0 to 31, the U flag is saved to

the stack during instruction execution and the U flag is set to 0 (ISP selected) before the interrupt sequence is

executed. The U flag is restored from the stack when returning from the interrupt routine. For software interrupt

numbers 32 to 63, the U flag does not change state during instruction execution, and the selected SP is used.

R8C/2G 数据表(PDF) 129 Page - Renesas Technology Corp