H8SSLASH2218 datasheet(422/750 Pages) RENESAS

422 / 750 page

Section 12 Serial Communication Interface

Rev.6.00 Jun. 03, 2008 Page 374 of 698

REJ09B0074-0600

Bit

Bit Name Initial Value

R/W

Description

MPIE

R/W

Multiprocessor Interrupt Enable (enabled only when the

MP bit in SMR is 1 in asynchronous mode)

When this bit is set to 1, receive data in which the

multiprocessor bit is 0 is skipped, and setting of the

RDRF, FER, and ORER status flags in SSR is

prohibited. On receiving data in which the multiprocessor

bit is 1, this bit is automatically cleared and normal

reception is resumed. For details, refer to section 12.5,

Multiprocessor Communication Function.

When receive data including MPB = 0 is received,

receive data transfer from RSR to RDR, receive error

detection, and setting of the RDRF, FER, and ORER

flags in SSR, is not performed. When receive data

including MPB = 1 is received, the MPB bit in SSR is set

to 1, the MPIE bit is cleared to 0 automatically, and

generation of RXI and ERI interrupts (when the TIE and

RIE bits in SCR are set to 1) and FER and ORER flag

setting is enabled.

TEIE

R/W

Transmit End Interrupt Enable

This bit is set to 1, TEI interrupt request is enabled. TEI

cancellation can be performed by reading 1 from the

TDRE flag in SSR, then clearing it to 0 and clearing the

TEND flag to 0, or clearing the TEIE bit to 0.

CKE1

CKE0

R/W

Clock Enable 0 and 1

Selects the clock source and SCK pin function.

Asynchronous mode

00: Internal baud rate generator

SCK pin functions as I/O port

01: Internal baud rate generator

Outputs a clock of the same frequency as the bit

rate from the SCK pin.

×: External clock

Inputs a clock with a frequency 16 times the bit rate

from the SCK pin.

Clocked synchronous mode

×: Internal clock (SCK pin functions as clock output)

×: External clock (SCK pin functions as clock input)

Legend:

×: Don’t care

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