H8SSLASH2218 datasheet(205/750 Pages) RENESAS

205 / 750 page

Section 7 DMA Controller (DMAC)

Rev.6.00 Jun. 03, 2008 Page 157 of 698

REJ09B0074-0600

Section 7 DMA Controller (DMAC)

This LSI has a built-in DMA controller (DMAC) which can carry out data transfer on up to 4

channels.

7.1

Features

The features of the DMAC are listed below.

• Choice of short address mode or full address mode

(1) Short address mode

— Maximum of 4 channels can be used

— Choice of dual address mode

— In dual address mode, one of the two addresses, transfer source and transfer destination,

is specified as 24 bits and the other as16 bits

— Choice of sequential mode, idle mode, or repeat mode for dual address mode

(2) Full address mode

— Maximum of 2 channels can be used

— Transfer source and transfer destination address specified as 24 bits

— Choice of normal mode or block transfer mode

• 16-Mbyte address space can be specified directly

• Byte or word can be set as the transfer unit

• Activation sources: internal interrupt, USB request, auto-request (depending on transfer mode)

⎯ 16-bit timer-pulse unit (TPU) compare match/input capture interrupts

⎯ Serial communication interface (SCI_0) transmission complete interrupt, reception

complete interrupt

⎯ A/D conversion end Interrupt

⎯ USB request

⎯ Auto-request

• Module stop mode can be set

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