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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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H8S/2218 数据表(PDF) 208 Page - Renesas Technology Corp |
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H8S/2218 数据表(HTML) 208 Page - Renesas Technology Corp |
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208 / 750 page  Section 7 DMA Controller (DMAC) Rev.6.00 Jun. 03, 2008 Page 160 of 698 REJ09B0074-0600 Table 7.1 Short Address Mode and Full Address Mode (For 1 Channel: Example of Channel 0) FAE0 Description 0 MAR0A Specifies transfer source/transfer destination address Specifies transfer destination/transfer source address Specifies number of transfers Specifies transfer size, mode, activation source, etc. Short address mode specified (channels A and B operate independently) Specifies transfer source/transfer destination address Specifies transfer destination/transfer source address Specifies number of transfers Specifies transfer size, mode, activation source, etc. IOAR0A ETCR0A DMACR0A MAR0B IOAR0B ETCR0B DMACR0B 1 MAR0A IOAR0A ETCR0A DMACR0A MAR0B IOAR0B ETCR0B DMACR0B Specifies transfer source address Specifies transfer destination address Not used Not used Specifies number of transfers Specifies number of transfers (used in block transfer mode only) Specifies transfer size, mode, activation source, etc. Full address mode specified (channels A and B operate combination) |
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