H8SSLASH2218 datasheet(211/750 Pages) RENESAS

部件名	H8S/2218

功能描述	16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

PDF	750 Pages

Scroll/Zoom	100%

制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

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Section 7 DMA Controller (DMAC)

Rev.6.00 Jun. 03, 2008 Page 163 of 698

REJ09B0074-0600

7.3.4

DMA Control Register (DMACR)

DMACR controls the operation of each DMAC channel.

• Short Address Mode (common to DMACRA and DMACRB)

Bit Bit Name Initial Value

R/W

Description

DTSZ

R/W

Data Transfer Size

Selects the size of data to be transferred at one time.

0: Byte-size transfer

1: Word-size transfer

DTID

R/W

Data Transfer Increment/Decrement

Selects incrementing or decrementing of MAR every data

transfer in sequential mode or repeat mode.

In idle mode, MAR is neither incremented nor decremented.

0: MAR is incremented after a data transfer

• When DTSZ = 0, MAR is incremented by 1 after a

transfer

• When DTSZ = 1, MAR is incremented by 2 after a

transfer

1: MAR is decremented after a data transfer

• When DTSZ = 0, MAR is decremented by 1 after a

transfer

• When DTSZ = 1, MAR is decremented by 2 after a

transfer

H8S/2218 数据表(PDF) 211 Page - Renesas Technology Corp