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H8S/2218 数据表(PDF) 213 Page - Renesas Technology Corp |
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H8S/2218 数据表(HTML) 213 Page - Renesas Technology Corp |
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213 / 750 page  Section 7 DMA Controller (DMAC) Rev.6.00 Jun. 03, 2008 Page 165 of 698 REJ09B0074-0600 Bit Bit Name Initial Value R/W Description 3 2 1 0 DTF3 DTF2 DTF1 DTF0 0 0 0 0 R/W R/W R/W R/W Data Transfer Factor These bits select the data transfer factor (activation source). 0000: ⎯ 0001: Activated by A/D conversion end interrupt 0010: ⎯ 0011: ⎯ 0100: Activated by SCI channel 0 transmission complete interrupt 0101: Activated by SCI channel 0 reception complete interrupt 0110: ⎯ 0111: ⎯ 1000: Activated by TPU channel 0 compare match/input capture A interrupt 1001: Activated by TPU channel 1 compare match/input capture A interrupt 1010: Activated by TPU channel 2 compare match/input capture A interrupt 1011: ⎯ 1100: ⎯ 1101: ⎯ 1110: ⎯ 1111: ⎯ The same factor can be selected for more than one channel. In this case, activation starts with the highest-priority channel according to the relative channel priorities. For relative channel priorities, see section 7.4.10, DMAC Multi-Channel Operation. |
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