H8SSLASH2218 datasheet(210/750 Pages) RENESAS

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Section 7 DMA Controller (DMAC)

Rev.6.00 Jun. 03, 2008 Page 162 of 698

REJ09B0074-0600

7.3.3

Execute Transfer Count Register (ETCR)

• Short Address Mode

ETCR is a 16-bit readable/writable register that specifies the number of transfers. The setting

of this register is different for sequential mode and idle mode on the one hand, and for repeat

mode on the other. ETCR is not initialized by a reset or in standby mode.

⎯ Sequential Mode and Idle Mode

In sequential mode and idle mode, ETCR functions as a 16-bit transfer counter (with a

count range of 1 to 65,536). ETCR is decremented by 1 each time a transfer is performed,

and when the count reaches H'0000, the DTE bit in DMABCR is cleared, and transfer ends.

⎯ Repeat Mode

In repeat mode, ETCR functions as an 8-bit transfer counter ETCRL (with a count range of

1 to 256) and transfer number storage register ETCRH. ETCRL is decremented by 1 each

time a transfer is performed, and when the count reaches H'00, ETCRL is loaded with the

value in ETCRH. At this point, MAR is automatically restored to the value it had when the

count was started. The DTE bit in DMABCR is not cleared, and so transfers can be

performed repeatedly until the DTE bit is cleared by the user.

• Full Address Mode

ETCR is a 16-bit readable/writable register that specifies the number of transfers. The function

of this register is different in normal mode and in block transfer mode. ETCR is not initialized

by a reset or in standby mode.

⎯ Normal Mode

(a) ETCRA

In normal mode, ETCRA functions as a 16-bit transfer counter. ETCRA is decremented by

1 each time a transfer is performed, and transfer ends when the count reaches H'0000.

(b) ETCRB

ETCRB is not used in normal mode.

⎯ Block Transfer Mode

(a) ETCRA

In block transfer mode, ETCRAL functions as an 8-bit block size counter and ETCRAH

holds the block size. ETCRAL is decremented each time a 1-byte or 1-word transfer is

performed, and when the count reaches H'00, ETCRAL is loaded with the value in

ETCRAH. So by setting the block size in ETCRAH and ETCRAL, it is possible to

repeatedly transfer blocks consisting of any desired number of bytes or words.

(b) ETCRB

ETCRB functions in block transfer mode, as a 16-bit block transfer counter. ETCRB is

decremented by 1 each time a block is transferred, and transfer ends when the count reaches

H'0000.

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