H8SSLASH2218 datasheet(206/750 Pages) RENESAS

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H8S/2218 数据表(PDF) 206 Page - Renesas Technology Corp

部件名	H8S/2218

功能描述	16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

PDF	750 Pages

Scroll/Zoom	100%

制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

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H8S/2218 数据表(HTML) 206 Page - Renesas Technology Corp

H8S/2218 Datasheet HTML 202Page - Renesas Technology Corp

H8S/2218 Datasheet HTML 203Page - Renesas Technology Corp

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H8S/2218 Datasheet HTML 205Page - Renesas Technology Corp

H8S/2218 Datasheet HTML 206Page - Renesas Technology Corp

H8S/2218 Datasheet HTML 207Page - Renesas Technology Corp

H8S/2218 Datasheet HTML 208Page - Renesas Technology Corp

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Section 7 DMA Controller (DMAC)

Rev.6.00 Jun. 03, 2008 Page 158 of 698

REJ09B0074-0600

A block diagram of the DMAC is shown in figure 7.1.

Internal address bus

Addres buffer

Processor

Internal interrupts

TGI0A

TGI1A

TGI2A

TXI0

RXI0

ADI

USB request signals

DREQ0

DREQ1

Interrupt signals

DEND0A

DEND0B

DEND1A

DEND1B

Control logic

DMACR1B

DMACR1A

DMACR0B

DMACR0A

DMATCR

DMABCR

Data buffer

Internal address bus

MAR0A

IOAR0A

ETCR0A

MAR0B

IOAR0B

ETCR0B

MAR1A

IOAR1A

ETCR1A

MAR1B

IOAR1B

ETCR1B

Legend:

DMATCR:

DMABCR:

DMACR:

MAR:

IOAR:

ETCR:

DMA terminal control register*

DMA band control register (for all channels)

DMA control register

Memory address register

I/O address register

Executive transfer counter register

Note: * Reserved register

Figure 7.1 Block Diagram of DMAC

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