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H8S/2225 数据表(PDF) 886 Page - Renesas Technology Corp

部件名 H8S/2225
功能描述  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  1071 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8S/2225 数据表(HTML) 886 Page - Renesas Technology Corp

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Section 24 Power-Down Modes
Rev. 5.00 Aug 08, 2006 page 800 of 982
REJ09B0054-0500
24.10
Direct Transitions
There are three modes, high-speed, medium-speed, and subactive, in which the CPU executes
programs. When a direct transition is made, there is no interruption of program execution when
shifting between high-speed and subactive modes. Direct transitions are enabled by setting the
LPWRCR DTON bit to 1, then executing the SLEEP instruction. After a transition, direct
transition interrupt exception processing starts.
24.10.1 Direct Transitions from High-Speed Mode to Subactive Mode
Execute the SLEEP instruction in high-speed mode when the SSBY bit in SBYCR = 1, the LSON
bit in LPWRCR = 1, and the DTON bit = 1, and the PSS bit in TSCR_1 (WDT_1) = 1 to make a
transition to subactive mode.
24.10.2 Direct Transitions from Subactive Mode to High-Speed Mode
Execute the SLEEP instruction in subactive mode when the SSBY bit in SBYCR = 1, the LSON
bit in LPWRCR = 0, and the DTON bit = 1, and the PSS bit in TSCR_1 (WDT_1) = 1 to make a
direct transition to high-speed mode after the time set in STS2 to STS0 bits in SBYCR has
elapsed.
24.11
φφφφ Clock Output Enable
The PSTOP bit in SCKCR and the DDR of the corresponding port control the
φ clock output.
When the PSTOP bit is set to 1,
φ clock stops at the end of the bus cycle and the φ clock output is
fixed high. When the PSTOP bit is cleared to 0, the
φ clock output is enabled. When the DDR of
the corresponding port is cleared to 0, the
φ clock output is disabled and it functions as an input
port. Table 24.4 lists the
φ pin states in respective process.
Table 24.4
φφφφ Pin States in Respective Processes
DDR
0
1
1
PSTOP
01
Hardware standby mode
High impedance
High impedance
High impedance
Software standby mode, watch
mode, direct transition
High impedance
Fixed to high
Fixed high
Sleep mode, subsleep mode
High impedance
φ output
Fixed high
High-speed mode, medium-
speed mode, subactive mode
High impedance
φ output
Fixed high



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