H8SSLASH2225 datasheet(294/1071 Pages) RENESAS

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Section 8 DMA Controller (DMAC)

Rev. 5.00 Aug 08, 2006 page 208 of 982

REJ09B0054-0500

IOAR can be used in short address mode but not in full address mode.

8.3.3

Execute Transfer Count Registers (ETCRA and ETCRB)

ETCR is a 16-bit readable/writable register that specifies the number of transfers.

The DMA has four ETCR registers: ETCR_0A in channel 0 (channel 0A), ETCR_0B in channel 0

(channel 0B), ETCR_1A in channel 1 (channel 1A), and ETCR_1B in channel 1 (channel 1B).

ETCR is not initialized by a reset or in standby mode.

Short Address Mode: The function of ETCR in sequential mode and idle mode differs from that

in repeat mode.

In sequential mode and idle mode, ETCR functions as a 16-bit transfer counter. ETCR is

decremented by 1 each time a transfer is performed, and when the count reaches H'00, the DTE bit

in DMABCRL is cleared, and transfer ends.

In repeat mode, ETCRL functions as an 8-bit transfer counter and ETCRH functions as a transfer

count holding register. ETCRL is decremented by 1 each time a transfer is performed, and when

the count reaches H'00, ETCRL is loaded with the value in ETCRH. At this point, MAR is

automatically restored to the value it had when the count was started. The DTE bit in DMABCRL

is not cleared, and so transfers can be performed repeatedly until the DTE bit is cleared by the

user.

Full Address Mode: The function of ETCR in normal mode differs from that in block transfer

mode.

In normal mode, ETCRA functions as a 16-bit transfer counter. ETCRA is decremented by 1 each

time a data transfer is performed, and transfer ends when the count reaches H'0000. ETCRB is not

used in normal mode.

In block transfer mode, ETCRAL functions as an 8-bit block size counter and ETCRAH functions

as a block size holding register. ETCRAL is decremented by 1 each time a 1-byte or 1-word

transfer is performed, and when the count reaches H'00, ETCRAL is loaded with the value in

ETCRAH. So by setting the block size in ETCRAH and ETCRAL, it is possible to repeatedly

transfer blocks consisting of any desired number of bytes or words.

In block transfer mode, ETCRB functions as a 16-bit block transfer counter. ETCRB is

decremented by 1 each time a block is transferred, and transfer ends when the count reaches

H'0000.

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