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SH7708 数据表(PDF) 224 Page - Renesas Technology Corp

部件名 SH7708
功能描述  SuperH??RISC engine
PDF  633 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

SH7708 数据表(HTML) 224 Page - Renesas Technology Corp

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206
10.2.4
Wait State Control Register 2 (WCR2)
Wait state control register 2 (WCR2) is a 16-bit read/write register that specifies the number of
wait state cycles inserted for each area. It also specifies the pitch of data access for burst memory
accesses. This allows direct connection of even low-speed memories without an external circuit.
WCR2 is initialized to H'FFFF by a power-on reset. It is not initialized by a manual reset or in
standby mode, but retains its contents.
Bit:
15
14
13
12
11
10
9
8
Bit name:
A6W2
A6W1
A6W0
A5W2
A5W1
A5W0
A4W2
A4W1
Initial value:
1
1
1
1
1
1
1
1
R/W:
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit:
7
6
5
4
3
2
1
0
Bit name:
A4W0
A3W1
A3W0
A1-2W1 A1-2W0
A0W2
A0W1
A0W0
Initial value:
1
1
1
1
1
1
1
1
R/W:
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bits 15 to 13—Area 6 Wait Control (A6W2, A6W1, A6W0): These bits specify the number of
wait states inserted in physical space area 6. They also specify the burst pitch for burst transfer.
Description
First Cycle
Burst Cycle
(Excluding First Cycle)
Bit 15:
A6W2
Bit 14:
A6W1
Bit 13:
A6W0
Inserted
Wait States
WAIT Pin
Number of States
Per Data Transfer
WAIT Pin
0
0
0
0
Ignored
2
Enabled
1
1
Enabled
2
Enabled
1
0
2
Enabled
3
Enabled
1
3
Enabled
4
Enabled
1
0
0
4
Enabled
4
Enabled
1
6
Enabled
6
Enabled
1
0
8
Enabled
8
Enabled
1
10 (Initial value) Enabled
10
Enabled



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