MPC8640DEC datasheet(36/140 Pages) FREESCALE

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MPC8640 and MPC8640D Integrated Host Processor Hardware Specifications, Rev. 1

Freescale Semiconductor

Ethernet: Enhanced Three-Speed Ethernet (eTSEC), MII Management

Figure 16 shows the TBI transmit AC timing diagram.

Figure 16. TBI Transmit AC Timing Diagram

8.2.4.2

TBI Receive AC Timing Specifications

Table 32 provides the TBI receive AC timing specifications.

Table 32. TBI Receive AC Timing Specifications

At recommended operating conditions with L/TVDD of 3.3 V ± 5% and 2.5 V ± 5%.

Parameter/Condition

Symbol 1

Min

Typ

Max

Unit

PMA_RX_CLK[0:1] clock period

tTRX

16.0

PMA_RX_CLK[0:1] skew

tSKTRX

7.5

—

8.5

PMA_RX_CLK[0:1] duty cycle

tTRXH/tTRX

—

RCG[9:0] setup time to rising PMA_RX_CLK

tTRDVKH

2.5

—

RCG[9:0] hold time to rising PMA_RX_CLK

tTRDXKH

1.5

—

PMA_RX_CLK[0:1] clock rise time (20%-80%)

tTRXR

0.7

—

2.4

PMA_RX_CLK[0:1] clock fall time (80%-20%)

tTRXF

0.7

—

2.4

Note:

1. The symbols used for timing specifications herein follow the pattern of t(first two letters of functional block)(signal)(state)

(reference)(state) for inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example,

tTRDVKH symbolizes TBI receive timing (TR) with respect to the time data input signals (D) reach the valid state (V)

relative to the tTRX clock reference (K) going to the high (H) state or setup time. Also, tTRDXKH symbolizes TBI

receive timing (TR) with respect to the time data input signals (D) went invalid (X) relative to the tTRX clock reference

(K) going to the high (H) state. Note that, in general, the clock reference symbol representation is based on three

letters representing the clock of a particular functional. For example, the subscript of tTRX represents the TBI (T)

receive (RX) clock. For rise and fall times, the latter convention is used with the appropriate letter: R (rise) or F (fall).

For symbols representing skews, the subscript is skew (SK) followed by the clock that is being skewed (TRX).

2. Guaranteed by design.

3. ±100 ppm tolerance on PMA_RX_CLK[0:1] frequency

GTX_CLK

TCG[9:0]

tTTXR

tTTX

tTTXH

tTTXR

tTTXF

tTTKHDV

tTTKHDX

tTTXF

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