MPC8640DEC datasheet(46/140 Pages) FREESCALE

部件名	MPC8640DEC

功能描述	Integrated Host Processor Hardware Specifications

PDF	140 Pages

Scroll/Zoom	100%

制造商	FREESCALE [Freescale Semiconductor, Inc]

网页	http://www.freescale.com

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MPC8640 and MPC8640D Integrated Host Processor Hardware Specifications, Rev. 1

Freescale Semiconductor

Local Bus

Figure 25. Local Bus AC Test Load

Figure 26 to Figure 31 show the local bus signals.

Figure 26. Local Bus Signals (PLL Enabled)

NOTE

PLL bypass mode is recommended when LBIU frequency is at or below

83 MHz. When LBIU operates above 83 Mhz, LBIU PLL is recommended

to be enabled.

Table 41 describes the general timing parameters of the local bus interface at OVDD = 3.3 V with PLL

bypassed.

Output

Z0 = 50 Ω

OVDD/2

RL = 50 Ω

Output Signals:

LA[27:31]/LBCTL/LBCKE/LOE/

LSDA10/LSDWE/LSDRAS/

LSDCAS/LSDDQM[0:3]

tLBKHOV1

tLBKHOV2

tLBKHOV3

LSYNC_IN

Input Signals:

LAD[0:31]/LDP[0:3]

Output (Data) Signals:

LAD[0:31]/LDP[0:3]

Output (Address) Signal:

LAD[0:31]

LALE

tLBIXKH1

tLBIVKH1

tLBIVKH2

tLBIXKH2

tLBKHOX1

tLBKHOZ1

tLBKHOX2

tLBKHOZ2

Input Signal:

LGTA

tLBOTOT

tLBKHOZ2

tLBKHOX2

tLBKHOV4

LUPWAIT

MPC8640DEC 数据表(PDF) 46 Page - Freescale Semiconductor, Inc

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