ST7263BEx datasheet(55/186 Pages) STMICROELECTRONICS

部件名	ST7263BEx

功能描述	Low speed USB 8-bit MCU family with up to 32 KB Flash/ROM, DFU capability, 8-bit ADC, WDG, timer, SCI and I²C

PDF	186 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

标志

55 / 186 page

ST7263Bxx

On-chip peripherals

Doc ID 7516 Rev 8

55/186

Figure 26.

Watchdog block diagram

Note:

Following a reset, the watchdog is disabled. Once activated it cannot be disabled, except by

a reset.

The T6 bit can be used to generate a software reset (the WDGA bit is set and the T6 bit is

cleared).

11.1.4

Software Watchdog option

If Software Watchdog is selected by option byte, the watchdog is disabled following a reset.

Once activated it cannot be disabled, except by a reset.

The T6 bit can be used to generate a software reset (the WDGA bit is set and the T6 bit is

cleared).

11.1.5

Hardware Watchdog option

If Hardware Watchdog is selected by option byte, the watchdog is always active and the

WDGA bit in the CR is not used.

11.1.6

Low power modes

WAIT instruction

No effect on Watchdog.

Table 17.

Watchdog timing (fCPU = 8 MHz)

CR register initial value

WDG timeout period (ms)

Max

FFh

393.216

Min

C0h

6.144

RESET

WDGA

7-BIT DOWNCOUNTER

fCPU

CLOCK DIVIDER

WATCHDOG CONTROL REGISTER (CR)

÷49152

ST7263BEx 数据表(PDF) 55 Page - STMicroelectronics

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